Update Assembler::TryAllocate to support inline allocation tracing

runtime/vm/assembler_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/heap.h"
@@ skipping 3452 matching lines @@
       : ClassHeapStats::allocated_since_gc_old_space_offset();
   const uword size_field_offset = (space == Heap::kNew)
       ? ClassHeapStats::allocated_size_since_gc_new_space_offset()
       : ClassHeapStats::allocated_size_since_gc_old_space_offset();
   movq(temp_reg, Immediate(class_heap_stats_table_address + class_offset));
   *count_address = Address(temp_reg, count_field_offset);
   *size_address = Address(temp_reg, size_field_offset);
 }
 
 
+void Assembler::ComputeHeapStatsStateAddressForCid(intptr_t cid,
+                                                   Address* state_address) {
+  ASSERT(cid < kNumPredefinedCids);
+  Register temp_reg = TMP;
+  Isolate* isolate = Isolate::Current();
+  ClassTable* class_table = isolate->class_table();
+  const uword class_heap_stats_table_address =
+      class_table->PredefinedClassHeapStatsTableAddress();
+  const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
+  const uword state_offset = ClassHeapStats::state_offset();
+  movq(temp_reg, Immediate(class_heap_stats_table_address +
+                           class_offset +
+                           state_offset));
+  *state_address = Address(temp_reg, 0);
+}
+
+
+void Assembler::MaybeTraceAllocation(intptr_t cid,
+                                     Label* trace,
+                                     bool near_jump) {
+  ASSERT(cid > 0);
+  Address state_address(kNoRegister, 0);
+  if (cid < kNumPredefinedCids) {
+    ComputeHeapStatsStateAddressForCid(cid, &state_address);
+  } else {
+    Register temp_reg = TMP;
+    const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
+    const uword state_offset = ClassHeapStats::state_offset();
+    // temp_reg gets address of class table pointer.
+    ClassTable* class_table = Isolate::Current()->class_table();
+    movq(temp_reg, Immediate(class_table->ClassStatsTableAddress()));
+    state_address = Address(temp_reg, class_offset + state_offset);
+  }
+  testb(state_address, Immediate(ClassHeapStats::TraceAllocationMask()));
+  // We are tracing for this class, jump to the trace label which will use
+  // the allocation stub.
+  j(NOT_ZERO, trace, near_jump);
+}
+
+
 void Assembler::UpdateAllocationStats(intptr_t cid,
                                       Heap::Space space) {
   ASSERT(cid > 0);
   if (cid < kNumPredefinedCids) {
     Address count_address(kNoRegister, 0), size_address(kNoRegister, 0);
     ComputeCounterAddressesForCid(cid, space, &count_address, &size_address);
     incq(count_address);
   } else {
     Register temp_reg = TMP;
     const uword class_offset = cid * sizeof(ClassHeapStats);  // NOLINT
@@ skipping 32 matching lines @@
 }
 
 
 void Assembler::TryAllocate(const Class& cls,
                             Label* failure,
                             bool near_jump,
                             Register instance_reg,
                             Register pp) {
   ASSERT(failure != NULL);
   if (FLAG_inline_alloc) {
+    // If this allocation is traced, program will jump to failure path
+    // (i.e. the allocation stub) which will allocate the object and trace the
+    // allocation call site.
+    MaybeTraceAllocation(cls.id(), failure, near_jump);
     Heap* heap = Isolate::Current()->heap();
     const intptr_t instance_size = cls.instance_size();
     Heap::Space space = heap->SpaceForAllocation(cls.id());
     LoadImmediate(TMP, Immediate(heap->TopAddress(space)), pp);
     movq(instance_reg, Address(TMP, 0));
     AddImmediate(instance_reg, Immediate(instance_size), pp);
     // instance_reg: potential next object start.
     LoadImmediate(TMP, Immediate(heap->EndAddress(space)), pp);
     cmpq(instance_reg, Address(TMP, 0));
     j(ABOVE_EQUAL, failure, near_jump);
@@ skipping 384 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64