Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(215)

Side by Side Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 1211243005: ARM: lowerSelect for integers. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceTargetLoweringARM32.cpp ('k') | tests_lit/llvm2ice_tests/select-opt.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
6 ; RUN: --target x8632 -i %s --args -O2 \ 6 ; RUN: --target x8632 -i %s --args -O2 \
7 ; RUN: | %if --need=target_X8632 --command FileCheck %s 7 ; RUN: | %if --need=target_X8632 --command FileCheck %s
8 8
9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
10 ; RUN: --target x8632 -i %s --args -Om1 \ 10 ; RUN: --target x8632 -i %s --args -Om1 \
(...skipping 1562 matching lines...) Expand 10 before | Expand all | Expand 10 after
1573 ; 1573 ;
1574 ; OPTM1-LABEL: select64VarVar 1574 ; OPTM1-LABEL: select64VarVar
1575 ; OPTM1: cmp 1575 ; OPTM1: cmp
1576 ; OPTM1: jb 1576 ; OPTM1: jb
1577 ; OPTM1: ja 1577 ; OPTM1: ja
1578 ; OPTM1: cmp 1578 ; OPTM1: cmp
1579 ; OPTM1: jb 1579 ; OPTM1: jb
1580 ; OPTM1: cmp 1580 ; OPTM1: cmp
1581 ; OPTM1: cmovne 1581 ; OPTM1: cmovne
1582 1582
1583 ; ARM32-LABEL: select64VarVar
1584 ; The initial compare.
1585 ; ARM32: cmp
1586 ; ARM32: cmpeq
1587 ; ARM32: movcc
1588 ; ARM32: movcs
1589 ; The non-folded compare for the select.
1590 ; ARM32: cmp
1591 ; ARM32: movne
1592 ; ARM32: movne
1593
1583 define internal i64 @select64VarConst(i64 %a, i64 %b) { 1594 define internal i64 @select64VarConst(i64 %a, i64 %b) {
1584 entry: 1595 entry:
1585 %cmp = icmp ult i64 %a, %b 1596 %cmp = icmp ult i64 %a, %b
1586 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256 1597 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256
1587 ret i64 %cond 1598 ret i64 %cond
1588 } 1599 }
1589 ; CHECK-LABEL: select64VarConst 1600 ; CHECK-LABEL: select64VarConst
1590 ; CHECK: cmp 1601 ; CHECK: cmp
1591 ; CHECK: jb 1602 ; CHECK: jb
1592 ; CHECK: ja 1603 ; CHECK: ja
1593 ; CHECK: cmp 1604 ; CHECK: cmp
1594 ; CHECK: jb 1605 ; CHECK: jb
1595 ; CHECK: cmp 1606 ; CHECK: cmp
1596 ; CHECK: cmovne 1607 ; CHECK: cmovne
1597 ; 1608 ;
1598 ; OPTM1-LABEL: select64VarConst 1609 ; OPTM1-LABEL: select64VarConst
1599 ; OPTM1: cmp 1610 ; OPTM1: cmp
1600 ; OPTM1: jb 1611 ; OPTM1: jb
1601 ; OPTM1: ja 1612 ; OPTM1: ja
1602 ; OPTM1: cmp 1613 ; OPTM1: cmp
1603 ; OPTM1: jb 1614 ; OPTM1: jb
1604 ; OPTM1: cmp 1615 ; OPTM1: cmp
1605 ; OPTM1: cmovne 1616 ; OPTM1: cmovne
1606 1617
1618 ; ARM32-LABEL: select64VarConst
1619 ; ARM32: cmp
1620 ; ARM32: cmpeq
1621 ; ARM32: movcc
1622 ; ARM32: movcs
1623 ; ARM32: cmp
1624 ; ARM32: movw
1625 ; ARM32: movt
1626 ; ARM32: movne
1627 ; ARM32: movw
1628 ; ARM32: movt
1629 ; ARM32: movne
1630
1607 define internal i64 @select64ConstVar(i64 %a, i64 %b) { 1631 define internal i64 @select64ConstVar(i64 %a, i64 %b) {
1608 entry: 1632 entry:
1609 %cmp = icmp ult i64 %a, %b 1633 %cmp = icmp ult i64 %a, %b
1610 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b 1634 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b
1611 ret i64 %cond 1635 ret i64 %cond
1612 } 1636 }
1613 ; CHECK-LABEL: select64ConstVar 1637 ; CHECK-LABEL: select64ConstVar
1614 ; CHECK: cmp 1638 ; CHECK: cmp
1615 ; CHECK: jb 1639 ; CHECK: jb
1616 ; CHECK: ja 1640 ; CHECK: ja
1617 ; CHECK: cmp 1641 ; CHECK: cmp
1618 ; CHECK: jb 1642 ; CHECK: jb
1619 ; CHECK: cmp 1643 ; CHECK: cmp
1620 ; CHECK: cmove 1644 ; CHECK: cmove
1621 ; 1645 ;
1622 ; OPTM1-LABEL: select64ConstVar 1646 ; OPTM1-LABEL: select64ConstVar
1623 ; OPTM1: cmp 1647 ; OPTM1: cmp
1624 ; OPTM1: jb 1648 ; OPTM1: jb
1625 ; OPTM1: ja 1649 ; OPTM1: ja
1626 ; OPTM1: cmp 1650 ; OPTM1: cmp
1627 ; OPTM1: jb 1651 ; OPTM1: jb
1628 ; OPTM1: cmp 1652 ; OPTM1: cmp
1629 ; OPTM1: cmove 1653 ; OPTM1: cmove
1630 1654
1655 ; ARM32-LABEL: select64ConstVar
1656 ; ARM32: cmp
1657 ; ARM32: cmpeq
1658 ; ARM32: movcc
1659 ; ARM32: movcs
1660 ; ARM32: cmp
1661 ; ARM32: movw
1662 ; ARM32: movt
1663 ; ARM32: movne
1664 ; ARM32: movw
1665 ; ARM32: movt
1666 ; ARM32: movne
1667
1631 define internal void @icmpEq64Imm() { 1668 define internal void @icmpEq64Imm() {
1632 entry: 1669 entry:
1633 %cmp = icmp eq i64 123, 234 1670 %cmp = icmp eq i64 123, 234
1634 br i1 %cmp, label %if.then, label %if.end 1671 br i1 %cmp, label %if.then, label %if.end
1635 1672
1636 if.then: ; preds = %entry 1673 if.then: ; preds = %entry
1637 call void @func() 1674 call void @func()
1638 br label %if.end 1675 br label %if.end
1639 1676
1640 if.end: ; preds = %if.then, %entry 1677 if.end: ; preds = %if.then, %entry
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
1678 ret void 1715 ret void
1679 } 1716 }
1680 ; The following checks are not strictly necessary since one of the RUN 1717 ; The following checks are not strictly necessary since one of the RUN
1681 ; lines actually runs the output through the assembler. 1718 ; lines actually runs the output through the assembler.
1682 ; CHECK-LABEL: icmpLt64Imm 1719 ; CHECK-LABEL: icmpLt64Imm
1683 ; CHECK-NOT: cmp 0x{{[0-9a-f]+}}, 1720 ; CHECK-NOT: cmp 0x{{[0-9a-f]+}},
1684 ; OPTM1-LABEL: icmpLt64Imm 1721 ; OPTM1-LABEL: icmpLt64Imm
1685 ; OPTM1-NOT: cmp 0x{{[0-9a-f]+}}, 1722 ; OPTM1-NOT: cmp 0x{{[0-9a-f]+}},
1686 ; ARM32-LABEL: icmpLt64Imm 1723 ; ARM32-LABEL: icmpLt64Imm
1687 ; ARM32-NOT: cmp #{{[0-9a-f]+}}, 1724 ; ARM32-NOT: cmp #{{[0-9a-f]+}},
OLDNEW
« no previous file with comments | « src/IceTargetLoweringARM32.cpp ('k') | tests_lit/llvm2ice_tests/select-opt.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698