Subzero: Avoid unused insts for ARM Om1 lowering for arithmetic

tests_lit/llvm2ice_tests/arith.ll

 ; Assembly test for simple arithmetic operations.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
 ; once enough infrastructure is in. Also, switch to --filetype=obj
 ; when possible.
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
 ; RUN:   -i %s --args -O2 --skip-unimplemented \
 ; RUN:   | %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command FileCheck --check-prefix ARM32 %s
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
 ; RUN:   -i %s --args -O2 --mattr=hwdiv-arm --skip-unimplemented \
 ; RUN:   | %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command FileCheck --check-prefix ARM32HWDIV %s
+; RUN: %if --need=target_ARM32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
+; RUN:   -i %s --args -Om1 --skip-unimplemented \
+; RUN:   | %if --need=target_ARM32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix ARM32 %s
 
 define i32 @Add(i32 %a, i32 %b) {
 entry:
   %add = add i32 %b, %a
   ret i32 %add
 }
 ; CHECK-LABEL: Add
 ; CHECK: add e
 ; ARM32-LABEL: Add
 ; ARM32: add r
@@ skipping 70 matching lines @@
 }
 ; NOTE: the lowering is currently a bit inefficient for small 64-bit constants.
 ; The top bits of the immediate are 0, but the instructions modeling that
 ; multiply by 0 are not eliminated (see expanded 64-bit ARM lowering).
 ; CHECK-LABEL: MulImm64
 ; CHECK: mov {{.*}},0x63
 ; CHECK: mov {{.*}},0x0
 ; CHECK-NOT: mul {{[0-9]+}}
 ;
 ; ARM32-LABEL: MulImm64
-; ARM32: mov {{.*}}, #99
-; ARM32: mov {{.*}}, #0
+; ARM32: movw {{.*}}, #99
+; ARM32: movw {{.*}}, #0
 ; ARM32: mul r
 ; ARM32: mla r
 ; ARM32: umull r
 ; ARM32: add r
 
 define i32 @Sdiv(i32 %a, i32 %b) {
 entry:
   %div = sdiv i32 %a, %b
   ret i32 %div
 }
 ; CHECK-LABEL: Sdiv
 ; CHECK: cdq
 ; CHECK: idiv e
 ;
 ; ARM32-LABEL: Sdiv
 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
-; ARM32: bne [[LABEL:[0-9a-f]+]]
+; ARM32: bne
 ; ARM32: .word 0xe7fedef0
-; ARM32: [[LABEL]]: {{.*}} bl {{.*}} __divsi3
+; ARM32: {{.*}} bl {{.*}} __divsi3
 ; ARM32HWDIV-LABEL: Sdiv
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: sdiv
 
 define i32 @SdivConst(i32 %a) {
 entry:
   %div = sdiv i32 %a, 219
   ret i32 %div
 }
@@ skipping 54 matching lines @@
 ;
 ; ARM32-LABEL: Urem
 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
 ; ARM32: bne
 ; ARM32: bl {{.*}} __umodsi3
 ; ARM32HWDIV-LABEL: Urem
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: udiv
 ; ARM32HWDIV: mls