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Issue 120723003: Refactors CPU feature detection. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 10 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/cpu.h"
10 #include "vm/heap.h" 11 #include "vm/heap.h"
11 #include "vm/memory_region.h" 12 #include "vm/memory_region.h"
12 #include "vm/runtime_entry.h" 13 #include "vm/runtime_entry.h"
13 #include "vm/stack_frame.h" 14 #include "vm/stack_frame.h"
14 #include "vm/stub_code.h" 15 #include "vm/stub_code.h"
15 16
16 namespace dart { 17 namespace dart {
17 18
18 DEFINE_FLAG(bool, print_stop_message, true, "Print stop message."); 19 DEFINE_FLAG(bool, print_stop_message, true, "Print stop message.");
19 DEFINE_FLAG(bool, use_sse41, true, "Use SSE 4.1 if available");
20 DECLARE_FLAG(bool, inline_alloc); 20 DECLARE_FLAG(bool, inline_alloc);
21 21
22 22
23 bool CPUFeatures::sse2_supported_ = false;
24 bool CPUFeatures::sse4_1_supported_ = false;
25 #ifdef DEBUG
26 bool CPUFeatures::initialized_ = false;
27 #endif
28
29
30 bool CPUFeatures::sse2_supported() {
31 DEBUG_ASSERT(initialized_);
32 return sse2_supported_;
33 }
34
35
36 bool CPUFeatures::sse4_1_supported() {
37 DEBUG_ASSERT(initialized_);
38 return sse4_1_supported_ && FLAG_use_sse41;
39 }
40
41
42 #define __ assembler.
43
44 void CPUFeatures::InitOnce() {
45 Assembler assembler;
46 __ pushl(EBP);
47 __ pushl(EBX);
48 __ movl(EBP, ESP);
49 // Get feature information in ECX:EDX and return it in EDX:EAX.
50 __ movl(EAX, Immediate(1));
51 __ cpuid();
52 __ movl(EAX, EDX);
53 __ movl(EDX, ECX);
54 __ movl(ESP, EBP);
55 __ popl(EBX);
56 __ popl(EBP);
57 __ ret();
58
59 const Code& code =
60 Code::Handle(Code::FinalizeCode("DetectCPUFeatures", &assembler));
61 Instructions& instructions = Instructions::Handle(code.instructions());
62 typedef uint64_t (*DetectCPUFeatures)();
63 uint64_t features =
64 reinterpret_cast<DetectCPUFeatures>(instructions.EntryPoint())();
65 sse2_supported_ = (features & kSSE2BitMask) != 0;
66 sse4_1_supported_ = (features & kSSE4_1BitMask) != 0;
67 #ifdef DEBUG
68 initialized_ = true;
69 #endif
70 }
71
72 #undef __
73
74
75 class DirectCallRelocation : public AssemblerFixup { 23 class DirectCallRelocation : public AssemblerFixup {
76 public: 24 public:
77 void Process(const MemoryRegion& region, intptr_t position) { 25 void Process(const MemoryRegion& region, intptr_t position) {
78 // Direct calls are relative to the following instruction on x86. 26 // Direct calls are relative to the following instruction on x86.
79 int32_t pointer = region.Load<int32_t>(position); 27 int32_t pointer = region.Load<int32_t>(position);
80 int32_t delta = region.start() + position + sizeof(int32_t); 28 int32_t delta = region.start() + position + sizeof(int32_t);
81 region.Store<int32_t>(position, pointer - delta); 29 region.Store<int32_t>(position, pointer - delta);
82 } 30 }
83 }; 31 };
84 32
(...skipping 1128 matching lines...) Expand 10 before | Expand all | Expand 10 after
1213 void Assembler::andpd(XmmRegister dst, XmmRegister src) { 1161 void Assembler::andpd(XmmRegister dst, XmmRegister src) {
1214 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1162 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1215 EmitUint8(0x66); 1163 EmitUint8(0x66);
1216 EmitUint8(0x0F); 1164 EmitUint8(0x0F);
1217 EmitUint8(0x54); 1165 EmitUint8(0x54);
1218 EmitXmmRegisterOperand(dst, src); 1166 EmitXmmRegisterOperand(dst, src);
1219 } 1167 }
1220 1168
1221 1169
1222 void Assembler::pextrd(Register dst, XmmRegister src, const Immediate& imm) { 1170 void Assembler::pextrd(Register dst, XmmRegister src, const Immediate& imm) {
1223 ASSERT(CPUFeatures::sse4_1_supported()); 1171 ASSERT(TargetCPUFeatures::sse4_1_supported());
1224 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1172 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1225 EmitUint8(0x66); 1173 EmitUint8(0x66);
1226 EmitUint8(0x0F); 1174 EmitUint8(0x0F);
1227 EmitUint8(0x3A); 1175 EmitUint8(0x3A);
1228 EmitUint8(0x16); 1176 EmitUint8(0x16);
1229 EmitOperand(src, Operand(dst)); 1177 EmitOperand(src, Operand(dst));
1230 ASSERT(imm.is_uint8()); 1178 ASSERT(imm.is_uint8());
1231 EmitUint8(imm.value()); 1179 EmitUint8(imm.value());
1232 } 1180 }
1233 1181
1234 1182
1235 void Assembler::pmovsxdq(XmmRegister dst, XmmRegister src) { 1183 void Assembler::pmovsxdq(XmmRegister dst, XmmRegister src) {
1236 ASSERT(CPUFeatures::sse4_1_supported()); 1184 ASSERT(TargetCPUFeatures::sse4_1_supported());
1237 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1185 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1238 EmitUint8(0x66); 1186 EmitUint8(0x66);
1239 EmitUint8(0x0F); 1187 EmitUint8(0x0F);
1240 EmitUint8(0x38); 1188 EmitUint8(0x38);
1241 EmitUint8(0x25); 1189 EmitUint8(0x25);
1242 EmitXmmRegisterOperand(dst, src); 1190 EmitXmmRegisterOperand(dst, src);
1243 } 1191 }
1244 1192
1245 1193
1246 void Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) { 1194 void Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) {
1247 ASSERT(CPUFeatures::sse4_1_supported()); 1195 ASSERT(TargetCPUFeatures::sse4_1_supported());
1248 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1196 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1249 EmitUint8(0x66); 1197 EmitUint8(0x66);
1250 EmitUint8(0x0F); 1198 EmitUint8(0x0F);
1251 EmitUint8(0x38); 1199 EmitUint8(0x38);
1252 EmitUint8(0x29); 1200 EmitUint8(0x29);
1253 EmitXmmRegisterOperand(dst, src); 1201 EmitXmmRegisterOperand(dst, src);
1254 } 1202 }
1255 1203
1256 1204
1257 void Assembler::pxor(XmmRegister dst, XmmRegister src) { 1205 void Assembler::pxor(XmmRegister dst, XmmRegister src) {
1258 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1206 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1259 EmitUint8(0x66); 1207 EmitUint8(0x66);
1260 EmitUint8(0x0F); 1208 EmitUint8(0x0F);
1261 EmitUint8(0xEF); 1209 EmitUint8(0xEF);
1262 EmitXmmRegisterOperand(dst, src); 1210 EmitXmmRegisterOperand(dst, src);
1263 } 1211 }
1264 1212
1265 1213
1266 void Assembler::roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode) { 1214 void Assembler::roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode) {
1267 ASSERT(CPUFeatures::sse4_1_supported()); 1215 ASSERT(TargetCPUFeatures::sse4_1_supported());
1268 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1216 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1269 EmitUint8(0x66); 1217 EmitUint8(0x66);
1270 EmitUint8(0x0F); 1218 EmitUint8(0x0F);
1271 EmitUint8(0x3A); 1219 EmitUint8(0x3A);
1272 EmitUint8(0x0B); 1220 EmitUint8(0x0B);
1273 EmitXmmRegisterOperand(dst, src); 1221 EmitXmmRegisterOperand(dst, src);
1274 // Mask precision exeption. 1222 // Mask precision exeption.
1275 EmitUint8(static_cast<uint8_t>(mode) | 0x8); 1223 EmitUint8(static_cast<uint8_t>(mode) | 0x8);
1276 } 1224 }
1277 1225
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2698 2646
2699 const char* Assembler::FpuRegisterName(FpuRegister reg) { 2647 const char* Assembler::FpuRegisterName(FpuRegister reg) {
2700 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 2648 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
2701 return xmm_reg_names[reg]; 2649 return xmm_reg_names[reg];
2702 } 2650 }
2703 2651
2704 2652
2705 } // namespace dart 2653 } // namespace dart
2706 2654
2707 #endif // defined TARGET_ARCH_IA32 2655 #endif // defined TARGET_ARCH_IA32
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