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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ | 5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ |
6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ | 6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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61 V(PPC_MaxDouble) \ | 61 V(PPC_MaxDouble) \ |
62 V(PPC_MinDouble) \ | 62 V(PPC_MinDouble) \ |
63 V(PPC_AbsDouble) \ | 63 V(PPC_AbsDouble) \ |
64 V(PPC_Cntlz32) \ | 64 V(PPC_Cntlz32) \ |
65 V(PPC_Cmp32) \ | 65 V(PPC_Cmp32) \ |
66 V(PPC_Cmp64) \ | 66 V(PPC_Cmp64) \ |
67 V(PPC_CmpDouble) \ | 67 V(PPC_CmpDouble) \ |
68 V(PPC_Tst32) \ | 68 V(PPC_Tst32) \ |
69 V(PPC_Tst64) \ | 69 V(PPC_Tst64) \ |
70 V(PPC_Push) \ | 70 V(PPC_Push) \ |
| 71 V(PPC_PushFrame) \ |
| 72 V(PPC_StoreToStackSlot) \ |
71 V(PPC_ExtendSignWord8) \ | 73 V(PPC_ExtendSignWord8) \ |
72 V(PPC_ExtendSignWord16) \ | 74 V(PPC_ExtendSignWord16) \ |
73 V(PPC_ExtendSignWord32) \ | 75 V(PPC_ExtendSignWord32) \ |
74 V(PPC_Uint32ToUint64) \ | 76 V(PPC_Uint32ToUint64) \ |
75 V(PPC_Int64ToInt32) \ | 77 V(PPC_Int64ToInt32) \ |
76 V(PPC_Int32ToDouble) \ | 78 V(PPC_Int32ToDouble) \ |
77 V(PPC_Uint32ToDouble) \ | 79 V(PPC_Uint32ToDouble) \ |
78 V(PPC_Float32ToDouble) \ | 80 V(PPC_Float32ToDouble) \ |
79 V(PPC_DoubleToInt32) \ | 81 V(PPC_DoubleToInt32) \ |
80 V(PPC_DoubleToUint32) \ | 82 V(PPC_DoubleToUint32) \ |
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116 // MRR = [register + register] | 118 // MRR = [register + register] |
117 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 119 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
118 V(MRI) /* [%r0 + K] */ \ | 120 V(MRI) /* [%r0 + K] */ \ |
119 V(MRR) /* [%r0 + %r1] */ | 121 V(MRR) /* [%r0 + %r1] */ |
120 | 122 |
121 } // namespace compiler | 123 } // namespace compiler |
122 } // namespace internal | 124 } // namespace internal |
123 } // namespace v8 | 125 } // namespace v8 |
124 | 126 |
125 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ | 127 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ |
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