OLD | NEW |
1 ; This file checks that Subzero generates code in accordance with the | 1 ; This file checks that Subzero generates code in accordance with the |
2 ; calling convention for integers. | 2 ; calling convention for integers. |
3 | 3 |
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
5 ; RUN: --target x8632 -i %s --args -O2 \ | 5 ; RUN: --target x8632 -i %s --args -O2 \ |
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
7 | 7 |
8 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) | 8 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
9 ; once enough infrastructure is in. Also, switch to --filetype=obj | 9 ; once enough infrastructure is in. Also, switch to --filetype=obj |
10 ; when possible. | 10 ; when possible. |
11 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \ | 11 ; RUN: %if --need=target_ARM32 --need=allow_dump \ |
| 12 ; RUN: --command %p2i --filetype=asm --assemble \ |
12 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ | 13 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ |
13 ; RUN: | %if --need=target_ARM32 --command FileCheck --check-prefix ARM32 %s | 14 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
| 15 ; RUN: --command FileCheck --check-prefix ARM32 %s |
14 | 16 |
15 ; For x86-32, integer arguments use the stack. | 17 ; For x86-32, integer arguments use the stack. |
16 ; For ARM32, integer arguments can be r0-r3. i64 arguments occupy two | 18 ; For ARM32, integer arguments can be r0-r3. i64 arguments occupy two |
17 ; adjacent 32-bit registers, and require the first to be an even register. | 19 ; adjacent 32-bit registers, and require the first to be an even register. |
18 | 20 |
19 | 21 |
20 ; i32 | 22 ; i32 |
21 | 23 |
22 define i32 @test_returning32_arg0(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i3
2 %arg4, i32 %arg5, i32 %arg6, i32 %arg7) { | 24 define i32 @test_returning32_arg0(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i3
2 %arg4, i32 %arg5, i32 %arg6, i32 %arg7) { |
23 entry: | 25 entry: |
(...skipping 241 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
265 ; ARM32-DAG: mov [[REG1:.*]], r1 | 267 ; ARM32-DAG: mov [[REG1:.*]], r1 |
266 ; ARM32-DAG: mov [[REG2:.*]], r2 | 268 ; ARM32-DAG: mov [[REG2:.*]], r2 |
267 ; ARM32-DAG: mov [[REG3:.*]], r3 | 269 ; ARM32-DAG: mov [[REG3:.*]], r3 |
268 ; ARM32: str [[REG2]], [sp] | 270 ; ARM32: str [[REG2]], [sp] |
269 ; ARM32: str [[REG1]], [sp, #4] | 271 ; ARM32: str [[REG1]], [sp, #4] |
270 ; ARM32-DAG: mov r0 | 272 ; ARM32-DAG: mov r0 |
271 ; ARM32-DAG: mov r1 | 273 ; ARM32-DAG: mov r1 |
272 ; ARM32-DAG: mov r2 | 274 ; ARM32-DAG: mov r2 |
273 ; ARM32-DAG: mov r3, [[REG3]] | 275 ; ARM32-DAG: mov r3, [[REG3]] |
274 ; ARM32: bl | 276 ; ARM32: bl |
OLD | NEW |