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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file declares the TargetLoweringMIPS32 class, which implements the | 10 // This file declares the TargetLoweringMIPS32 class, which implements the |
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108 const AssignList &Assignments) override; | 108 const AssignList &Assignments) override; |
109 void doAddressOptLoad() override; | 109 void doAddressOptLoad() override; |
110 void doAddressOptStore() override; | 110 void doAddressOptStore() override; |
111 void randomlyInsertNop(float Probability) override; | 111 void randomlyInsertNop(float Probability) override; |
112 void makeRandomRegisterPermutation( | 112 void makeRandomRegisterPermutation( |
113 llvm::SmallVectorImpl<int32_t> &Permutation, | 113 llvm::SmallVectorImpl<int32_t> &Permutation, |
114 const llvm::SmallBitVector &ExcludeRegisters) const override; | 114 const llvm::SmallBitVector &ExcludeRegisters) const override; |
115 | 115 |
116 static Type stackSlotType(); | 116 static Type stackSlotType(); |
117 | 117 |
118 bool UsesFramePointer; | 118 bool UsesFramePointer = false; |
119 bool NeedsStackAlignment; | 119 bool NeedsStackAlignment = false; |
120 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; | 120 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; |
121 llvm::SmallBitVector ScratchRegs; | 121 llvm::SmallBitVector ScratchRegs; |
122 llvm::SmallBitVector RegsUsed; | 122 llvm::SmallBitVector RegsUsed; |
123 VarList PhysicalRegisters[IceType_NUM]; | 123 VarList PhysicalRegisters[IceType_NUM]; |
124 static IceString RegNames[]; | 124 static IceString RegNames[]; |
125 | 125 |
126 private: | 126 private: |
127 ~TargetMIPS32() override {} | 127 ~TargetMIPS32() override {} |
128 }; | 128 }; |
129 | 129 |
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162 protected: | 162 protected: |
163 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 163 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
164 | 164 |
165 private: | 165 private: |
166 ~TargetHeaderMIPS32() = default; | 166 ~TargetHeaderMIPS32() = default; |
167 }; | 167 }; |
168 | 168 |
169 } // end of namespace Ice | 169 } // end of namespace Ice |
170 | 170 |
171 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 171 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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