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| 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file declares the TargetLoweringARM32 class, which implements the | 10 // This file declares the TargetLoweringARM32 class, which implements the |
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| 295 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred)); | 295 InstARM32Umull::create(Func, DestLo, DestHi, Src0, Src1, Pred)); |
| 296 // Model the modification to the second dest as a fake def. | 296 // Model the modification to the second dest as a fake def. |
| 297 // Note that the def is not predicated. | 297 // Note that the def is not predicated. |
| 298 Context.insert(InstFakeDef::create(Func, DestHi, DestLo)); | 298 Context.insert(InstFakeDef::create(Func, DestHi, DestLo)); |
| 299 } | 299 } |
| 300 void _uxt(Variable *Dest, Variable *Src0, | 300 void _uxt(Variable *Dest, Variable *Src0, |
| 301 CondARM32::Cond Pred = CondARM32::AL) { | 301 CondARM32::Cond Pred = CondARM32::AL) { |
| 302 Context.insert(InstARM32Uxt::create(Func, Dest, Src0, Pred)); | 302 Context.insert(InstARM32Uxt::create(Func, Dest, Src0, Pred)); |
| 303 } | 303 } |
| 304 | 304 |
| 305 ARM32InstructionSet InstructionSet; | 305 ARM32InstructionSet InstructionSet = ARM32InstructionSet::Begin; |
| 306 bool UsesFramePointer; | 306 bool UsesFramePointer = false; |
| 307 bool NeedsStackAlignment; | 307 bool NeedsStackAlignment = false; |
| 308 bool MaybeLeafFunc; | 308 bool MaybeLeafFunc = true; |
| 309 size_t SpillAreaSizeBytes; | 309 size_t SpillAreaSizeBytes = 0; |
| 310 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; | 310 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; |
| 311 llvm::SmallBitVector ScratchRegs; | 311 llvm::SmallBitVector ScratchRegs; |
| 312 llvm::SmallBitVector RegsUsed; | 312 llvm::SmallBitVector RegsUsed; |
| 313 VarList PhysicalRegisters[IceType_NUM]; | 313 VarList PhysicalRegisters[IceType_NUM]; |
| 314 static IceString RegNames[]; | 314 static IceString RegNames[]; |
| 315 | 315 |
| 316 // Helper class that understands the Calling Convention and register | 316 // Helper class that understands the Calling Convention and register |
| 317 // assignments. The first few integer type parameters can use r0-r3, | 317 // assignments. The first few integer type parameters can use r0-r3, |
| 318 // regardless of their position relative to the floating-point/vector | 318 // regardless of their position relative to the floating-point/vector |
| 319 // arguments in the argument list. Floating-point and vector arguments | 319 // arguments in the argument list. Floating-point and vector arguments |
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| 381 protected: | 381 protected: |
| 382 explicit TargetHeaderARM32(GlobalContext *Ctx); | 382 explicit TargetHeaderARM32(GlobalContext *Ctx); |
| 383 | 383 |
| 384 private: | 384 private: |
| 385 ~TargetHeaderARM32() = default; | 385 ~TargetHeaderARM32() = default; |
| 386 }; | 386 }; |
| 387 | 387 |
| 388 } // end of namespace Ice | 388 } // end of namespace Ice |
| 389 | 389 |
| 390 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H | 390 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H |
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