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Side by Side Diff: sim/testsuite/sim/bfin/random_0037.S

Issue 11969036: Merge GDB 7.5.1 (Closed) Base URL: http://git.chromium.org/native_client/nacl-gdb.git@master
Patch Set: Created 7 years, 11 months ago
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1 # mach: bfin
2 #include "test.h"
3 .include "testutils.inc"
4
5 start
6
7 dmm32 ASTAT, (0x1880c200 | _VS | _AV1S | _AV0S | _AC1);
8 dmm32 A0.w, 0x2b9a5661;
9 dmm32 A0.x, 0x00000032;
10 dmm32 A1.w, 0x1a0c4c8c;
11 dmm32 A1.x, 0xffffff80;
12 imm32 R0, 0x694a9cb0;
13 imm32 R6, 0x651cc0dd;
14 A1 += R0.L * R0.H (M), R6.L = (A0 += R0.L * R0.H) (TFU);
15 checkreg R6, 0x651cffff;
16 checkreg A0.w, 0x6c0bd141;
17 checkreg A0.x, 0x00000032;
18 checkreg A1.w, 0x00000000;
19 checkreg A1.x, 0xffffff80;
20 checkreg ASTAT, (0x1880c200 | _VS | _V | _AV1S | _AV1 | _AV0S | _AC1 | _ V_COPY);
21
22 dmm32 ASTAT, (0x14104490 | _VS | _AV1S | _AZ);
23 dmm32 A0.w, 0x6ec017a0;
24 dmm32 A0.x, 0x00000000;
25 dmm32 A1.w, 0xff6f5846;
26 dmm32 A1.x, 0x0000007f;
27 imm32 R3, 0x256a8306;
28 imm32 R6, 0x6a8ca1e4;
29 imm32 R7, 0x2e579ce0;
30 R6.H = (A1 -= R3.L * R7.L) (M), A0 = R3.L * R7.L (TFU);
31 checkreg R6, 0x7fffa1e4;
32 checkreg A0.w, 0x504a4d40;
33 checkreg A0.x, 0x00000000;
34 checkreg A1.w, 0xffffffff;
35 checkreg A1.x, 0x0000007f;
36 checkreg ASTAT, (0x14104490 | _VS | _V | _AV1S | _AV1 | _V_COPY | _AZ);
37
38 dmm32 ASTAT, (0x20008080 | _VS | _V | _AV1S | _AV0 | _AC1 | _AC0 | _AQ);
39 dmm32 A0.w, 0x58b9bdf1;
40 dmm32 A0.x, 0xffffffe2;
41 dmm32 A1.w, 0x42c9fae8;
42 dmm32 A1.x, 0xffffff80;
43 imm32 R1, 0x68df1898;
44 imm32 R2, 0x3ae1b1f0;
45 imm32 R5, 0x61c3f5ef;
46 A1 += R2.L * R5.L (M), R1.L = (A0 -= R2.L * R5.L) (TFU);
47 checkreg R1, 0x68dfffff;
48 checkreg A0.w, 0xadc8eee1;
49 checkreg A0.x, 0xffffffe1;
50 checkreg A1.w, 0x00000000;
51 checkreg A1.x, 0xffffff80;
52 checkreg ASTAT, (0x20008080 | _VS | _V | _AV1S | _AV1 | _AC1 | _AC0 | _A Q | _V_COPY);
53
54 dmm32 ASTAT, (0x1c70ca90 | _VS | _V | _AV1S | _AV0S | _CC | _V_COPY | _A C0_COPY);
55 dmm32 A0.w, 0x082c2157;
56 dmm32 A0.x, 0xffffff9f;
57 dmm32 A1.w, 0x275e1474;
58 dmm32 A1.x, 0xffffff80;
59 imm32 R1, 0x7d3179fd;
60 imm32 R2, 0x5b41566f;
61 R2.H = (A1 -= R1.L * R1.H) (M), R2.L = (A0 = R1.L * R1.L) (TFU);
62 checkreg R2, 0x80003a21;
63 checkreg A0.w, 0x3a212409;
64 checkreg A0.x, 0x00000000;
65 checkreg A1.w, 0x00000000;
66 checkreg A1.x, 0xffffff80;
67 checkreg ASTAT, (0x1c70ca90 | _VS | _V | _AV1S | _AV1 | _AV0S | _CC | _V _COPY | _AC0_COPY);
68
69 dmm32 ASTAT, (0x7460cc10 | _VS | _V | _AV1S | _AV0S | _AV0 | _AQ | _CC | _V_COPY);
70 dmm32 A0.w, 0x7fffffff;
71 dmm32 A0.x, 0x00000000;
72 dmm32 A1.w, 0xf20b4000;
73 dmm32 A1.x, 0x0000007f;
74 imm32 R1, 0x2ca2d045;
75 imm32 R6, 0x6e516a3c;
76 R1.H = (A1 -= R1.L * R6.H) (M), A0 = R1.L * R6.H (TFU);
77 checkreg R1, 0x7fffd045;
78 checkreg A0.w, 0x59bf8bd5;
79 checkreg A0.x, 0x00000000;
80 checkreg A1.w, 0xffffffff;
81 checkreg A1.x, 0x0000007f;
82 checkreg ASTAT, (0x7460cc10 | _VS | _V | _AV1S | _AV1 | _AV0S | _AQ | _C C | _V_COPY);
83
84 pass
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