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Issue 11969036: Merge GDB 7.5.1 (Closed) Base URL: http://git.chromium.org/native_client/nacl-gdb.git@master
Patch Set: Created 7 years, 11 months ago
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1 # mach: bfin
2 #include "test.h"
3 .include "testutils.inc"
4
5 start
6
7 dmm32 ASTAT, (0x3ce04490 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _AC 0_COPY);
8 dmm32 A0.w, 0x7d8d8272;
9 dmm32 A0.x, 0x00000000;
10 dmm32 A1.w, 0xe0004138;
11 dmm32 A1.x, 0x0000007f;
12 imm32 R0, 0x7d8e7fff;
13 imm32 R2, 0xffff8001;
14 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
15 checkreg A0.w, 0xfd8c0273;
16 checkreg A0.x, 0x00000000;
17 checkreg A1.w, 0xffffffff;
18 checkreg A1.x, 0x0000007f;
19 checkreg ASTAT, (0x3ce04490 | _VS | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _AQ | _AC0_COPY);
20
21 dmm32 ASTAT, (0x70b0c800 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _V_C OPY | _AC0_COPY);
22 dmm32 A0.w, 0x53931540;
23 dmm32 A0.x, 0x00000000;
24 dmm32 A1.w, 0xf07795da;
25 dmm32 A1.x, 0x0000007f;
26 imm32 R2, 0x8931da0a;
27 imm32 R4, 0xffff41eb;
28 imm32 R5, 0x7fff41eb;
29 A1 += R5.L * R4.H (M), R2 = (A0 -= R5.L * R4.H) (FU);
30 checkreg R2, 0x11a8572b;
31 checkreg A0.w, 0x11a8572b;
32 checkreg A0.x, 0x00000000;
33 checkreg A1.w, 0xffffffff;
34 checkreg A1.x, 0x0000007f;
35 checkreg ASTAT, (0x70b0c800 | _VS | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _AC0_COPY);
36
37 dmm32 ASTAT, (0x58100410 | _VS | _V | _AV1S | _AC0 | _CC | _V_COPY | _AC 0_COPY);
38 dmm32 A0.w, 0xaeba0d61;
39 dmm32 A0.x, 0x00000041;
40 dmm32 A1.w, 0xbb313d2f;
41 dmm32 A1.x, 0x0000007f;
42 imm32 R4, 0x1ea2588d;
43 imm32 R7, 0xffffffff;
44 A1 += R4.L * R7.H (M), A0 += R4.L * R7.L (FU);
45 checkreg A0.w, 0x0746b4d4;
46 checkreg A0.x, 0x00000042;
47 checkreg A1.w, 0xffffffff;
48 checkreg A1.x, 0x0000007f;
49 checkreg ASTAT, (0x58100410 | _VS | _V | _AV1S | _AV1 | _AC0 | _CC | _V_ COPY | _AC0_COPY);
50
51 dmm32 ASTAT, (0x58704200 | _VS | _AV1S | _AV0S);
52 dmm32 A0.w, 0xb7ab4854;
53 dmm32 A0.x, 0x00000000;
54 dmm32 A1.w, 0xe0002429;
55 dmm32 A1.x, 0x0000007f;
56 imm32 R0, 0xb7ac8000;
57 imm32 R2, 0x80008001;
58 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
59 checkreg A0.w, 0xf7ab4854;
60 checkreg A0.x, 0x00000000;
61 checkreg A1.w, 0xffffffff;
62 checkreg A1.x, 0x0000007f;
63 checkreg ASTAT, (0x58704200 | _VS | _AV1S | _AV1 | _AV0S);
64
65 dmm32 ASTAT, (0x38d0c800 | _VS | _AV1S | _AV0S);
66 dmm32 A0.w, 0xfffe0001;
67 dmm32 A0.x, 0x00000000;
68 dmm32 A1.w, 0xffff4001;
69 dmm32 A1.x, 0x0000007f;
70 imm32 R0, 0xffffffff;
71 imm32 R2, 0xffffffff;
72 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
73 checkreg A0.w, 0xfffc0002;
74 checkreg A0.x, 0x00000001;
75 checkreg A1.w, 0xffffffff;
76 checkreg A1.x, 0x0000007f;
77 checkreg ASTAT, (0x38d0c800 | _VS | _AV1S | _AV1 | _AV0S);
78
79 dmm32 ASTAT, (0x24e0ca80 | _VS | _V | _AV0S | _AC0 | _AQ | _V_COPY);
80 dmm32 A0.w, 0x0000000a;
81 dmm32 A0.x, 0x00000000;
82 dmm32 A1.w, 0xff5439dc;
83 dmm32 A1.x, 0x0000007f;
84 imm32 R0, 0x3ea961c5;
85 imm32 R6, 0xffff0510;
86 A1 += R0.L * R6.H (M), A0 -= R0.H * R6.H (FU);
87 checkreg A0.w, 0x00000000;
88 checkreg A0.x, 0x00000000;
89 checkreg A1.w, 0xffffffff;
90 checkreg A1.x, 0x0000007f;
91 checkreg ASTAT, (0x24e0ca80 | _VS | _V | _AV1S | _AV1 | _AV0S | _AV0 | _ AC0 | _AQ | _V_COPY);
92
93 dmm32 ASTAT, (0x7800cc80 | _VS | _AC1 | _AC0 | _CC | _AC0_COPY);
94 dmm32 A0.w, 0xfffe0001;
95 dmm32 A0.x, 0x00000000;
96 dmm32 A1.w, 0xffff4001;
97 dmm32 A1.x, 0x0000007f;
98 imm32 R0, 0xffffffff;
99 imm32 R2, 0x0000ffff;
100 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
101 checkreg A1.w, 0xffffffff;
102 checkreg A1.x, 0x0000007f;
103 checkreg ASTAT, (0x7800cc80 | _VS | _AV1S | _AV1 | _AC1 | _AC0 | _CC | _ AC0_COPY);
104
105 dmm32 ASTAT, (0x50200800 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AC0_COPY );
106 dmm32 A0.w, 0x6970968f;
107 dmm32 A0.x, 0x00000000;
108 dmm32 A1.w, 0xe0004b47;
109 dmm32 A1.x, 0x0000007f;
110 imm32 R0, 0x69717fff;
111 imm32 R2, 0xffff8001;
112 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
113 checkreg A0.w, 0xe96f1690;
114 checkreg A0.x, 0x00000000;
115 checkreg A1.w, 0xffffffff;
116 checkreg A1.x, 0x0000007f;
117 checkreg ASTAT, (0x50200800 | _VS | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _AC0_COPY);
118
119 dmm32 ASTAT, (0x34704080 | _VS | _AV1S | _AV1 | _AV0S | _AQ | _CC | _AC0 _COPY);
120 dmm32 A0.w, 0x0839a708;
121 dmm32 A0.x, 0xffffff80;
122 dmm32 A1.w, 0xffffffff;
123 dmm32 A1.x, 0x0000007f;
124 imm32 R0, 0x0c8c109a;
125 imm32 R2, 0x109a0c8c;
126 imm32 R5, 0x006dd6ac;
127 A1 -= R5.L * R0.L (M), R2.L = (A0 += R5.H * R0.L) (FU);
128 checkreg R2, 0x109affff;
129 checkreg A0.w, 0x0840b89a;
130 checkreg A0.x, 0xffffff80;
131 checkreg ASTAT, (0x34704080 | _VS | _V | _AV1S | _AV1 | _AV0S | _AQ | _C C | _V_COPY | _AC0_COPY);
132
133 dmm32 ASTAT, (0x78108090 | _VS | _AV1S | _AV0S | _AC0 | _AQ | _AC0_COPY) ;
134 dmm32 A0.w, 0x21edde12;
135 dmm32 A0.x, 0x00000000;
136 dmm32 A1.w, 0xe0006f08;
137 dmm32 A1.x, 0x0000007f;
138 imm32 R0, 0x21ee7fff;
139 imm32 R2, 0xffff8001;
140 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
141 checkreg A0.w, 0xa1ec5e13;
142 checkreg A0.x, 0x00000000;
143 checkreg A1.w, 0xffffffff;
144 checkreg A1.x, 0x0000007f;
145 checkreg ASTAT, (0x78108090 | _VS | _AV1S | _AV1 | _AV0S | _AC0 | _AQ | _AC0_COPY);
146
147 dmm32 ASTAT, (0x50b08a10 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _V_C OPY | _AC0_COPY);
148 dmm32 A0.w, 0x00000007;
149 dmm32 A0.x, 0x00000000;
150 dmm32 A1.w, 0xf8b109fc;
151 dmm32 A1.x, 0x0000007f;
152 imm32 R0, 0x27827703;
153 imm32 R6, 0xffff03ca;
154 A1 += R0.L * R6.H (M), A0 -= R0.H * R6.H (FU);
155 checkreg A0.w, 0x00000000;
156 checkreg A0.x, 0x00000000;
157 checkreg A1.w, 0xffffffff;
158 checkreg A1.x, 0x0000007f;
159 checkreg ASTAT, (0x50b08a10 | _VS | _V | _AV1S | _AV1 | _AV0S | _AV0 | _ AC1 | _AC0 | _V_COPY | _AC0_COPY);
160
161 dmm32 ASTAT, (0x34e0c800 | _VS | _V | _AV1S | _AV0S | _AQ | _V_COPY);
162 dmm32 A0.w, 0xffffffff;
163 dmm32 A0.x, 0xffffffff;
164 dmm32 A1.w, 0xefc2be42;
165 dmm32 A1.x, 0x0000007f;
166 imm32 R0, 0x53574850;
167 imm32 R6, 0xffff1400;
168 A1 += R0.L * R6.H (M), A0 -= R0.H * R6.H (FU);
169 checkreg A0.w, 0xaca95356;
170 checkreg A0.x, 0xffffffff;
171 checkreg A1.w, 0xffffffff;
172 checkreg A1.x, 0x0000007f;
173 checkreg ASTAT, (0x34e0c800 | _VS | _V | _AV1S | _AV1 | _AV0S | _AQ | _V _COPY);
174
175 dmm32 ASTAT, (0x24608c80 | _VS | _AV1S | _AV0S | _AC0 | _AQ | _AC0_COPY) ;
176 dmm32 A0.w, 0x0f03f0fc;
177 dmm32 A0.x, 0x00000000;
178 dmm32 A1.w, 0xe000787d;
179 dmm32 A1.x, 0x0000007f;
180 imm32 R0, 0x0f04ffff;
181 imm32 R2, 0xffff8001;
182 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
183 checkreg A0.w, 0x0f01f0fd;
184 checkreg A0.x, 0x00000001;
185 checkreg A1.w, 0xffffffff;
186 checkreg A1.x, 0x0000007f;
187 checkreg ASTAT, (0x24608c80 | _VS | _AV1S | _AV1 | _AV0S | _AC0 | _AQ | _AC0_COPY);
188
189 dmm32 ASTAT, (0x58404690 | _VS | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
190 dmm32 A0.w, 0x1e65e19a;
191 dmm32 A0.x, 0x00000000;
192 dmm32 A1.w, 0xe00070cc;
193 dmm32 A1.x, 0x0000007f;
194 imm32 R0, 0x1e66ffff;
195 imm32 R2, 0xffff8001;
196 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
197 checkreg A0.w, 0x1e63e19b;
198 checkreg A0.x, 0x00000001;
199 checkreg A1.w, 0xffffffff;
200 checkreg A1.x, 0x0000007f;
201 checkreg ASTAT, (0x58404690 | _VS | _AV1S | _AV1 | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
202
203 dmm32 ASTAT, (0x08004a10 | _VS | _AV1S | _AV1 | _AC0 | _CC | _AC0_COPY);
204 dmm32 A1.w, 0xffffffff;
205 dmm32 A1.x, 0x0000007f;
206 imm32 R0, 0x293a8000;
207 imm32 R3, 0xd0e6382b;
208 A1 += R3.L * R0.H (M, FU);
209 checkreg ASTAT, (0x08004a10 | _VS | _AV1S | _AV1 | _AC0 | _CC | _AC0_COP Y);
210 checkreg A1.w, 0xffffffff;
211 checkreg A1.x, 0x0000007f;
212 checkreg R0, 0x293a8000;
213 checkreg R3, 0xd0e6382b;
214
215 dmm32 ASTAT, (0x28e00e00 | _VS | _AV1S | _AV0S | _AC0 | _AQ | _AC0_COPY) ;
216 dmm32 A0.w, 0xfffe0001;
217 dmm32 A0.x, 0x00000000;
218 dmm32 A1.w, 0xffff4001;
219 dmm32 A1.x, 0x0000007f;
220 imm32 R0, 0xffffffff;
221 imm32 R2, 0x0000ffff;
222 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
223 checkreg A1.w, 0xffffffff;
224 checkreg A1.x, 0x0000007f;
225 checkreg ASTAT, (0x28e00e00 | _VS | _AV1S | _AV1 | _AV0S | _AC0 | _AQ | _AC0_COPY);
226
227 dmm32 ASTAT, (0x14004690 | _VS | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _A Q | _AC0_COPY | _AN);
228 dmm32 A1.w, 0xffffffff;
229 dmm32 A1.x, 0x0000007f;
230 imm32 R0, 0x369a8000;
231 imm32 R3, 0xf023457e;
232 A1 += R3.L * R0.H (M, FU);
233 checkreg ASTAT, (0x14004690 | _VS | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _AQ | _AC0_COPY | _AN);
234 checkreg A1.w, 0xffffffff;
235 checkreg A1.x, 0x0000007f;
236 checkreg R0, 0x369a8000;
237 checkreg R3, 0xf023457e;
238
239 dmm32 ASTAT, (0x5c600680 | _VS | _AV1S | _AQ | _CC);
240 dmm32 A0.w, 0xfffe0001;
241 dmm32 A0.x, 0x00000000;
242 dmm32 A1.w, 0xffff4001;
243 dmm32 A1.x, 0x0000007f;
244 imm32 R0, 0xffffffff;
245 imm32 R2, 0xffffffff;
246 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
247 checkreg A0.w, 0xfffc0002;
248 checkreg A0.x, 0x00000001;
249 checkreg A1.w, 0xffffffff;
250 checkreg A1.x, 0x0000007f;
251 checkreg ASTAT, (0x5c600680 | _VS | _AV1S | _AV1 | _AQ | _CC);
252
253 dmm32 ASTAT, (0x7cd00800 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AC0_COPY );
254 dmm32 A0.w, 0xfffe0001;
255 dmm32 A0.x, 0x00000000;
256 dmm32 A1.w, 0xffff4001;
257 dmm32 A1.x, 0x0000007f;
258 imm32 R0, 0xffffffff;
259 imm32 R2, 0x0000ffff;
260 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
261 checkreg A1.w, 0xffffffff;
262 checkreg A1.x, 0x0000007f;
263 checkreg ASTAT, (0x7cd00800 | _VS | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _AC0_COPY);
264
265 dmm32 ASTAT, (0x78e0cc10 | _VS | _AV1S | _AV0S | _AC1);
266 dmm32 A0.w, 0xfffe0001;
267 dmm32 A0.x, 0x00000000;
268 dmm32 A1.w, 0xffff4001;
269 dmm32 A1.x, 0x0000007f;
270 imm32 R0, 0xffffffff;
271 imm32 R2, 0xffffffff;
272 A1 -= R2.L * R0.L (M), A0 += R2.H * R0.L (FU);
273 checkreg A0.w, 0xfffc0002;
274 checkreg A0.x, 0x00000001;
275 checkreg A1.w, 0xffffffff;
276 checkreg A1.x, 0x0000007f;
277 checkreg ASTAT, (0x78e0cc10 | _VS | _AV1S | _AV1 | _AV0S | _AC1);
278
279 dmm32 ASTAT, (0x1cd04c80 | _VS | _V | _AV0S | _AC1 | _V_COPY | _AC0_COPY );
280 dmm32 A0.w, 0x00000015;
281 dmm32 A0.x, 0x00000000;
282 dmm32 A1.w, 0xfeeaa91d;
283 dmm32 A1.x, 0x0000007f;
284 imm32 R0, 0x50246875;
285 imm32 R6, 0xffff0aab;
286 A1 += R0.L * R6.H (M), A0 -= R0.H * R6.H (FU);
287 checkreg A0.w, 0x00000000;
288 checkreg A0.x, 0x00000000;
289 checkreg A1.w, 0xffffffff;
290 checkreg A1.x, 0x0000007f;
291 checkreg ASTAT, (0x1cd04c80 | _VS | _V | _AV1S | _AV1 | _AV0S | _AV0 | _ AC1 | _V_COPY | _AC0_COPY);
292
293 dmm32 ASTAT, (0x18304890 | _VS | _AV1S | _AV0S | _AC0 | _AQ | _CC | _AC0 _COPY);
294 dmm32 A0.w, 0xfffffffe;
295 dmm32 A0.x, 0xffffffff;
296 dmm32 A1.w, 0xffffca85;
297 dmm32 A1.x, 0x0000007f;
298 imm32 R0, 0xffffffff;
299 imm32 R3, 0xffffdc58;
300 imm32 R7, 0xffff950a;
301 A1 -= R7.L * R0.H (M), R3.L = (A0 -= R7.L * R0.H) (FU);
302 checkreg R3, 0xffffffff;
303 checkreg A0.w, 0x6af69508;
304 checkreg A0.x, 0xffffffff;
305 checkreg A1.w, 0xffffffff;
306 checkreg A1.x, 0x0000007f;
307 checkreg ASTAT, (0x18304890 | _VS | _V | _AV1S | _AV1 | _AV0S | _AC0 | _ AQ | _CC | _V_COPY | _AC0_COPY);
308
309 pass
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