sim/testsuite/sim/bfin/c_dsp32shiftim_af_s.s - Issue 11969036: Merge GDB 7.5.1

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Side by Side Diff: sim/testsuite/sim/bfin/c_dsp32shiftim_af_s.s

Issue 11969036: Merge GDB 7.5.1 (Closed) Base URL: http://git.chromium.org/native_client/nacl-gdb.git@master

Patch Set: Created 7 years, 11 months ago

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1 //Original:/testcases/core/c_dsp32shiftim_af_s/c_dsp32shiftim_af_s.dsp	1 //Original:/testcases/core/c_dsp32shiftim_af_s/c_dsp32shiftim_af_s.dsp

2 # mach: bfin	2 # mach: bfin

3	3

4 .include "testutils.inc"	4 .include "testutils.inc"

5 start	5 start

6	6

7	7

8 // Spec Reference: dsp32shiftimm ashift: ashift saturated	8 // Spec Reference: dsp32shiftimm ashift: ashift saturated

9	9

10	10

(...skipping 15 matching lines...) Expand all Loading...
26 R7 = R7 << 20 (S);	26 R7 = R7 << 20 (S);

27 CHECKREG r0, 0x81230001;	27 CHECKREG r0, 0x81230001;

28 CHECKREG r1, 0x7FFFFFFF;	28 CHECKREG r1, 0x7FFFFFFF;

29 CHECKREG r2, 0x7FFFFFFF;	29 CHECKREG r2, 0x7FFFFFFF;

30 CHECKREG r3, 0x7FFFFFFF;	30 CHECKREG r3, 0x7FFFFFFF;

31 CHECKREG r4, 0x80000000;	31 CHECKREG r4, 0x80000000;

32 CHECKREG r5, 0x80000000;	32 CHECKREG r5, 0x80000000;

33 CHECKREG r6, 0x80000000;	33 CHECKREG r6, 0x80000000;

34 CHECKREG r7, 0x80000000;	34 CHECKREG r7, 0x80000000;

35	35

36 imm32 r0, 0x3a1230001;	36 imm32 r0, 0xa1230001;

37 imm32 r1, 0x1e345678;	37 imm32 r1, 0x1e345678;

38 imm32 r2, 0x23f56789;	38 imm32 r2, 0x23f56789;

39 imm32 r3, 0x34db789a;	39 imm32 r3, 0x34db789a;

40 imm32 r4, 0x85a7a9ab;	40 imm32 r4, 0x85a7a9ab;

41 imm32 r5, 0x967c9abc;	41 imm32 r5, 0x967c9abc;

42 imm32 r6, 0xa78dabcd;	42 imm32 r6, 0xa78dabcd;

43 imm32 r7, 0xb8914cde;	43 imm32 r7, 0xb8914cde;

44 R6 = R0 >>> 1;	44 R6 = R0 >>> 1;

45 R7 = R1 >>> 3;	45 R7 = R1 >>> 3;

46 R0 = R2 >>> 7;	46 R0 = R2 >>> 7;

47 R1 = R3 >>> 8;	47 R1 = R3 >>> 8;

48 R2 = R4 >>> 15;	48 R2 = R4 >>> 15;

49 R3 = R5 >>> 24;	49 R3 = R5 >>> 24;

50 R4 = R6 >>> 31;	50 R4 = R6 >>> 31;

51 R5 = R7 >>> 20;	51 R5 = R7 >>> 20;

52 CHECKREG r0, 0x0047EACF;	52 CHECKREG r0, 0x0047EACF;

53 CHECKREG r1, 0x0034DB78;	53 CHECKREG r1, 0x0034DB78;

54 CHECKREG r2, 0xFFFF0B4F;	54 CHECKREG r2, 0xFFFF0B4F;

55 CHECKREG r3, 0xFFFFFF96;	55 CHECKREG r3, 0xFFFFFF96;

56 CHECKREG r4, 0xFFFFFFFF;	56 CHECKREG r4, 0xFFFFFFFF;

57 CHECKREG r5, 0x0000003C;	57 CHECKREG r5, 0x0000003C;

58 CHECKREG r6, 0xD0918000;	58 CHECKREG r6, 0xD0918000;

59 CHECKREG r7, 0x03C68ACF;	59 CHECKREG r7, 0x03C68ACF;

60	60

61	61

62	62

63 pass	63 pass

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