Merge GDB 7.5.1

opcodes/micromips-opc.c

 /* micromips-opc.c.  microMIPS opcode table.
-   Copyright 2008 Free Software Foundation, Inc.
+   Copyright 2008, 2012 Free Software Foundation, Inc.
    Contributed by Chao-ying Fu, MIPS Technologies, Inc.
 
    This file is part of the GNU opcodes library.
 
    This library is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3, or (at your option)
    any later version.
 
    It is distributed in the hope that it will be useful, but WITHOUT
    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
    License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this file; see the file COPYING.  If not, write to the
    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
+#include "sysdep.h"
 #include <stdio.h>
-#include "sysdep.h"
 #include "opcode/mips.h"
 
 #define UBD     INSN_UNCOND_BRANCH_DELAY
 #define CBD     INSN_COND_BRANCH_DELAY
 #define NODS    INSN_NO_DELAY_SLOT
 #define TRAP    INSN_NO_DELAY_SLOT
 #define SM      INSN_STORE_MEMORY
 #define BD16    INSN2_BRANCH_DELAY_16BIT        /* Used in pinfo2.  */
 #define BD32    INSN2_BRANCH_DELAY_32BIT        /* Used in pinfo2.  */
 
@@ skipping 928 matching lines @@
 {"wsbh",    "t,r",      0x00007b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
 {"xor",     "mf,mt,mg",     0x4440,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
 {"xor",     "mf,mg,mx",     0x4440,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
 {"xor",     "d,v,t",    0x00000310, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
 {"xor",     "t,r,I",    0,    (int) M_XOR_I,    INSN_MACRO,             0,              I1      },
 {"xori",    "t,r,i",    0x70000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
 };
 
 const int bfd_micromips_num_opcodes =
   ((sizeof micromips_opcodes) / (sizeof (micromips_opcodes[0])));