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Side by Side Diff: gdb/sparc-tdep.c

Issue 11969036: Merge GDB 7.5.1 (Closed) Base URL: http://git.chromium.org/native_client/nacl-gdb.git@master
Patch Set: Created 7 years, 11 months ago
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1 /* Target-dependent code for SPARC. 1 /* Target-dependent code for SPARC.
2 2
3 Copyright (C) 2003-2012 Free Software Foundation, Inc. 3 Copyright (C) 2003-2012 Free Software Foundation, Inc.
4 4
5 This file is part of GDB. 5 This file is part of GDB.
6 6
7 This program is free software; you can redistribute it and/or modify 7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or 9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version. 10 (at your option) any later version.
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78 #define X_COND(i) (((i) >> 25) & 0xf) 78 #define X_COND(i) (((i) >> 25) & 0xf)
79 #define X_OP2(i) (((i) >> 22) & 0x7) 79 #define X_OP2(i) (((i) >> 22) & 0x7)
80 #define X_IMM22(i) ((i) & 0x3fffff) 80 #define X_IMM22(i) ((i) & 0x3fffff)
81 #define X_OP3(i) (((i) >> 19) & 0x3f) 81 #define X_OP3(i) (((i) >> 19) & 0x3f)
82 #define X_RS1(i) (((i) >> 14) & 0x1f) 82 #define X_RS1(i) (((i) >> 14) & 0x1f)
83 #define X_RS2(i) ((i) & 0x1f) 83 #define X_RS2(i) ((i) & 0x1f)
84 #define X_I(i) (((i) >> 13) & 1) 84 #define X_I(i) (((i) >> 13) & 1)
85 /* Sign extension macros. */ 85 /* Sign extension macros. */
86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000) 86 #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000)
87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000) 87 #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000)
88 #define X_DISP10(i) ((((((i) >> 11) && 0x300) | (((i) >> 5) & 0xff)) ^ 0x200) - 0x200)
88 #define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000) 89 #define X_SIMM13(i) ((((i) & 0x1fff) ^ 0x1000) - 0x1000)
89 90
90 /* Fetch the instruction at PC. Instructions are always big-endian 91 /* Fetch the instruction at PC. Instructions are always big-endian
91 even if the processor operates in little-endian mode. */ 92 even if the processor operates in little-endian mode. */
92 93
93 unsigned long 94 unsigned long
94 sparc_fetch_instruction (CORE_ADDR pc) 95 sparc_fetch_instruction (CORE_ADDR pc)
95 { 96 {
96 gdb_byte buf[4]; 97 gdb_byte buf[4];
97 unsigned long insn; 98 unsigned long insn;
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591 location for inserting the breakpoint. */ 592 location for inserting the breakpoint. */
592 593
593 static const gdb_byte * 594 static const gdb_byte *
594 sparc_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) 595 sparc_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
595 { 596 {
596 static const gdb_byte break_insn[] = { 0x91, 0xd0, 0x20, 0x01 }; 597 static const gdb_byte break_insn[] = { 0x91, 0xd0, 0x20, 0x01 };
597 598
598 *len = sizeof (break_insn); 599 *len = sizeof (break_insn);
599 return break_insn; 600 return break_insn;
600 } 601 }

error: old chunk mismatch

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