Merge GDB 7.5.1

gdb/mips-linux-nat.c

 /* Native-dependent code for GNU/Linux on MIPS processors.
 
    Copyright (C) 2001-2012 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
@@ skipping 18 matching lines @@
 #include "mips-linux-tdep.h"
 #include "target-descriptions.h"
 
 #include "gdb_proc_service.h"
 #include "gregset.h"
 
 #include <sgidefs.h>
 #include <sys/ptrace.h>
 
 #include "features/mips-linux.c"
+#include "features/mips-dsp-linux.c"
 #include "features/mips64-linux.c"
+#include "features/mips64-dsp-linux.c"
 
 #ifndef PTRACE_GET_THREAD_AREA
 #define PTRACE_GET_THREAD_AREA 25
 #endif
 
 /* Assume that we have PTRACE_GETREGS et al. support.  If we do not,
    we'll clear this and use PTRACE_PEEKUSER instead.  */
 static int have_ptrace_regsets = 1;
 
 /* Whether or not to print the mirrored debug registers.  */
@@ skipping 37 matching lines @@
   else if (regno == mips_regnum (gdbarch)->badvaddr)
     regaddr = store? (CORE_ADDR) -1 : BADVADDR;
   else if (regno == mips_regnum (gdbarch)->lo)
     regaddr = MMLO;
   else if (regno == mips_regnum (gdbarch)->hi)
     regaddr = MMHI;
   else if (regno == mips_regnum (gdbarch)->fp_control_status)
     regaddr = FPC_CSR;
   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
     regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
+  else if (mips_regnum (gdbarch)->dspacc != -1
+           && regno >= mips_regnum (gdbarch)->dspacc
+           && regno < mips_regnum (gdbarch)->dspacc + 6)
+    regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
+  else if (regno == mips_regnum (gdbarch)->dspctl)
+    regaddr = DSP_CONTROL;
   else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
     regaddr = 0;
   else
     regaddr = (CORE_ADDR) -1;
 
   return regaddr;
 }
 
 static CORE_ADDR
 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
@@ skipping 15 matching lines @@
   else if (regno == mips_regnum (gdbarch)->badvaddr)
     regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
   else if (regno == mips_regnum (gdbarch)->lo)
     regaddr = MIPS64_MMLO;
   else if (regno == mips_regnum (gdbarch)->hi)
     regaddr = MIPS64_MMHI;
   else if (regno == mips_regnum (gdbarch)->fp_control_status)
     regaddr = MIPS64_FPC_CSR;
   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
     regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
+  else if (mips_regnum (gdbarch)->dspacc != -1
+           && regno >= mips_regnum (gdbarch)->dspacc
+           && regno < mips_regnum (gdbarch)->dspacc + 6)
+    regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
+  else if (regno == mips_regnum (gdbarch)->dspctl)
+    regaddr = DSP_CONTROL;
   else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
     regaddr = 0;
   else
     regaddr = (CORE_ADDR) -1;
 
   return regaddr;
 }
 
 /* Fetch the thread-local storage pointer for libthread_db.  */
 
@@ skipping 52 matching lines @@
   else
     mips64_fill_fpregset (regcache,
                           (mips64_elf_fpregset_t *) fpregsetp, regno);
 }
 
 
 /* Fetch REGNO (or all registers if REGNO == -1) from the target
    using PTRACE_GETREGS et al.  */
 
 static void
-mips64_linux_regsets_fetch_registers (struct regcache *regcache, int regno)
+mips64_linux_regsets_fetch_registers (struct target_ops *ops,
+                                      struct regcache *regcache, int regno)
 {
   struct gdbarch *gdbarch = get_regcache_arch (regcache);
-  int is_fp;
+  int is_fp, is_dsp;
+  int have_dsp;
+  int regi;
   int tid;
 
   if (regno >= mips_regnum (gdbarch)->fp0
       && regno <= mips_regnum (gdbarch)->fp0 + 32)
     is_fp = 1;
   else if (regno == mips_regnum (gdbarch)->fp_control_status)
     is_fp = 1;
   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
     is_fp = 1;
   else
     is_fp = 0;
 
+  /* DSP registers are optional and not a part of any set.  */
+  have_dsp = mips_regnum (gdbarch)->dspctl != -1;
+  if (!have_dsp)
+    is_dsp = 0;
+  else if (regno >= mips_regnum (gdbarch)->dspacc
+      && regno < mips_regnum (gdbarch)->dspacc + 6)
+    is_dsp = 1;
+  else if (regno == mips_regnum (gdbarch)->dspctl)
+    is_dsp = 1;
+  else
+    is_dsp = 0;
+
   tid = ptid_get_lwp (inferior_ptid);
   if (tid == 0)
     tid = ptid_get_pid (inferior_ptid);
 
-  if (regno == -1 || !is_fp)
+  if (regno == -1 || (!is_fp && !is_dsp))
     {
       mips64_elf_gregset_t regs;
 
       if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
         {
           if (errno == EIO)
             {
               have_ptrace_regsets = 0;
               return;
             }
@@ skipping 15 matching lines @@
             {
               have_ptrace_regsets = 0;
               return;
             }
           perror_with_name (_("Couldn't get FP registers"));
         }
 
       mips64_supply_fpregset (regcache,
                               (const mips64_elf_fpregset_t *) &fp_regs);
     }
+
+  if (is_dsp)
+    super_fetch_registers (ops, regcache, regno);
+  else if (regno == -1 && have_dsp)
+    {
+      for (regi = mips_regnum (gdbarch)->dspacc;
+           regi < mips_regnum (gdbarch)->dspacc + 6;
+           regi++)
+        super_fetch_registers (ops, regcache, regi);
+      super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
+    }
 }
 
 /* Store REGNO (or all registers if REGNO == -1) to the target
    using PTRACE_SETREGS et al.  */
 
 static void
-mips64_linux_regsets_store_registers (const struct regcache *regcache,
-                                      int regno)
+mips64_linux_regsets_store_registers (struct target_ops *ops,
+                                      struct regcache *regcache, int regno)
 {
   struct gdbarch *gdbarch = get_regcache_arch (regcache);
-  int is_fp;
+  int is_fp, is_dsp;
+  int have_dsp;
+  int regi;
   int tid;
 
   if (regno >= mips_regnum (gdbarch)->fp0
       && regno <= mips_regnum (gdbarch)->fp0 + 32)
     is_fp = 1;
   else if (regno == mips_regnum (gdbarch)->fp_control_status)
     is_fp = 1;
   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
     is_fp = 1;
   else
     is_fp = 0;
 
+  /* DSP registers are optional and not a part of any set.  */
+  have_dsp = mips_regnum (gdbarch)->dspctl != -1;
+  if (!have_dsp)
+    is_dsp = 0;
+  if (regno >= mips_regnum (gdbarch)->dspacc
+      && regno < mips_regnum (gdbarch)->dspacc + 6)
+    is_dsp = 1;
+  else if (regno == mips_regnum (gdbarch)->dspctl)
+    is_dsp = 1;
+  else
+    is_dsp = 0;
+
   tid = ptid_get_lwp (inferior_ptid);
   if (tid == 0)
     tid = ptid_get_pid (inferior_ptid);
 
-  if (regno == -1 || !is_fp)
+  if (regno == -1 || (!is_fp && !is_dsp))
     {
       mips64_elf_gregset_t regs;
 
       if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
         perror_with_name (_("Couldn't get registers"));
 
       mips64_fill_gregset (regcache, &regs, regno);
 
       if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
         perror_with_name (_("Couldn't set registers"));
     }
 
   if (regno == -1 || is_fp)
     {
       mips64_elf_fpregset_t fp_regs;
 
       if (ptrace (PTRACE_GETFPREGS, tid, 0L,
                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
         perror_with_name (_("Couldn't get FP registers"));
 
       mips64_fill_fpregset (regcache, &fp_regs, regno);
 
       if (ptrace (PTRACE_SETFPREGS, tid, 0L,
                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
         perror_with_name (_("Couldn't set FP registers"));
     }
+
+  if (is_dsp)
+    super_store_registers (ops, regcache, regno);
+  else if (regno == -1 && have_dsp)
+    {
+      for (regi = mips_regnum (gdbarch)->dspacc;
+           regi < mips_regnum (gdbarch)->dspacc + 6;
+           regi++)
+        super_store_registers (ops, regcache, regi);
+      super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
+    }
 }
 
 /* Fetch REGNO (or all registers if REGNO == -1) from the target
    using any working method.  */
 
 static void
 mips64_linux_fetch_registers (struct target_ops *ops,
                               struct regcache *regcache, int regnum)
 {
   /* Unless we already know that PTRACE_GETREGS does not work, try it.  */
   if (have_ptrace_regsets)
-    mips64_linux_regsets_fetch_registers (regcache, regnum);
+    mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
 
   /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
      back to PTRACE_PEEKUSER.  */
   if (!have_ptrace_regsets)
     super_fetch_registers (ops, regcache, regnum);
 }
 
 /* Store REGNO (or all registers if REGNO == -1) to the target
    using any working method.  */
 
 static void
 mips64_linux_store_registers (struct target_ops *ops,
                               struct regcache *regcache, int regnum)
 {
   /* Unless we already know that PTRACE_GETREGS does not work, try it.  */
   if (have_ptrace_regsets)
-    mips64_linux_regsets_store_registers (regcache, regnum);
+    mips64_linux_regsets_store_registers (ops, regcache, regnum);
 
   /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
      back to PTRACE_PEEKUSER.  */
   if (!have_ptrace_regsets)
     super_store_registers (ops, regcache, regnum);
 }
 
 /* Return the address in the core dump or inferior of register
    REGNO.  */
 
 static CORE_ADDR
 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
 {
   if (mips_abi_regsize (gdbarch) == 8)
     return mips64_linux_register_addr (gdbarch, regno, store_p);
   else
     return mips_linux_register_addr (gdbarch, regno, store_p);
 }
 
 static const struct target_desc *
 mips_linux_read_description (struct target_ops *ops)
 {
+  static int have_dsp = -1;
+
+  if (have_dsp < 0)
+    {
+      int tid;
+
+      tid = ptid_get_lwp (inferior_ptid);
+      if (tid == 0)
+        tid = ptid_get_pid (inferior_ptid);
+
+      ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
+      switch (errno)
+        {
+        case 0:
+          have_dsp = 1;
+          break;
+        case EIO:
+          have_dsp = 0;
+          break;
+        default:
+          perror_with_name (_("Couldn't check DSP support"));
+          break;
+        }
+    }
+
   /* Report that target registers are a size we know for sure
      that we can get from ptrace.  */
   if (_MIPS_SIM == _ABIO32)
-    return tdesc_mips_linux;
+    return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
   else
-    return tdesc_mips64_linux;
+    return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
 }
 
 #ifndef PTRACE_GET_WATCH_REGS
 #  define PTRACE_GET_WATCH_REGS 0xd0
 #endif
 
 #ifndef PTRACE_SET_WATCH_REGS
 #  define PTRACE_SET_WATCH_REGS 0xd1
 #endif
 
@@ skipping 497 matching lines @@
       if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
         perror_with_name (_("Couldn't write debug register"));
     }
   return 0;
 }
 
 /* linux_nat new_thread implementation.  Write the mirrored watch
  register values for the new thread.  */
 
 static void
-mips_linux_new_thread (ptid_t ptid)
+mips_linux_new_thread (struct lwp_info *lp)
 {
   int tid;
 
   if (!mips_linux_read_watch_registers (0))
     return;
 
-  tid = ptid_get_lwp (ptid);
+  tid = ptid_get_lwp (lp->ptid);
   if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
     perror_with_name (_("Couldn't write debug register"));
 }
 
 /* Fill in the watch registers with the currently cached watches.  */
 
 static void
 populate_regs_from_watches (struct pt_watch_regs *regs)
 {
   struct mips_watchpoint *w;
@@ skipping 175 matching lines @@
   t->to_stopped_data_address = mips_linux_stopped_data_address;
   t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
 
   t->to_read_description = mips_linux_read_description;
 
   linux_nat_add_target (t);
   linux_nat_set_new_thread (t, mips_linux_new_thread);
 
   /* Initialize the standard target descriptions.  */
   initialize_tdesc_mips_linux ();
+  initialize_tdesc_mips_dsp_linux ();
   initialize_tdesc_mips64_linux ();
+  initialize_tdesc_mips64_dsp_linux ();
 }