Merge GDB 7.5.1

gdb/m32r-tdep.c

 /* Target-dependent code for Renesas M32R, for GDB.
 
    Copyright (C) 1996, 1998-2005, 2007-2012 Free Software Foundation,
    Inc.
 
    This file is part of GDB.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
@@ skipping 67 matching lines @@
   
    The following functions take care of this behavior.  */
 
 static int
 m32r_memory_insert_breakpoint (struct gdbarch *gdbarch,
                                struct bp_target_info *bp_tgt)
 {
   CORE_ADDR addr = bp_tgt->placed_address;
   int val;
   gdb_byte buf[4];
-  gdb_byte *contents_cache = bp_tgt->shadow_contents;
+  gdb_byte contents_cache[4];
   gdb_byte bp_entry[] = { 0x10, 0xf1 }; /* dpt */
 
   /* Save the memory contents.  */
   val = target_read_memory (addr & 0xfffffffc, contents_cache, 4);
   if (val != 0)
     return val;                 /* return error */
 
+  memcpy (bp_tgt->shadow_contents, contents_cache, 4);
   bp_tgt->placed_size = bp_tgt->shadow_len = 4;
 
   /* Determine appropriate breakpoint contents and size for this address.  */
   if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
     {
       if ((addr & 3) == 0)
         {
           buf[0] = bp_entry[0];
           buf[1] = bp_entry[1];
           buf[2] = contents_cache[2] & 0x7f;
@@ skipping 423 matching lines @@
    in the stack frame.  sp is even more special: the address we return
    for it IS the sp for the next frame.  */
 
 static struct m32r_unwind_cache *
 m32r_frame_unwind_cache (struct frame_info *this_frame,
                          void **this_prologue_cache)
 {
   CORE_ADDR pc, scan_limit;
   ULONGEST prev_sp;
   ULONGEST this_base;
-  unsigned long op, op2;
+  unsigned long op;
   int i;
   struct m32r_unwind_cache *info;
 
 
   if ((*this_prologue_cache))
     return (*this_prologue_cache);
 
   info = FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache);
   (*this_prologue_cache) = info;
   info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
@@ skipping 139 matching lines @@
   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
   int stack_offset, stack_alloc;
   int argreg = ARG1_REGNUM;
   int argnum;
   struct type *type;
   enum type_code typecode;
   CORE_ADDR regval;
   gdb_byte *val;
   gdb_byte valbuf[MAX_REGISTER_SIZE];
   int len;
-  int odd_sized_struct;
 
   /* First force sp to a 4-byte alignment.  */
   sp = sp & ~3;
 
   /* Set the return address.  For the m32r, the return breakpoint is
      always at BP_ADDR.  */
   regcache_cooked_write_unsigned (regcache, LR_REGNUM, bp_addr);
 
   /* If STRUCT_RETURN is true, then the struct return address (in
      STRUCT_ADDR) will consume the first argument-passing register.
@@ skipping 91 matching lines @@
   /* Ignore return values more than 8 bytes in size because the m32r
      returns anything more than 8 bytes in the stack.  */
   if (len > 4)
     {
       regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
       store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp);
     }
 }
 
 static enum return_value_convention
-m32r_return_value (struct gdbarch *gdbarch, struct type *func_type,
+m32r_return_value (struct gdbarch *gdbarch, struct value *function,
                    struct type *valtype, struct regcache *regcache,
                    gdb_byte *readbuf, const gdb_byte *writebuf)
 {
   if (TYPE_LENGTH (valtype) > 8)
     return RETURN_VALUE_STRUCT_CONVENTION;
   else
     {
       if (readbuf != NULL)
         m32r_extract_return_value (valtype, regcache, readbuf);
       if (writebuf != NULL)
@@ skipping 149 matching lines @@
   set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
 
   return gdbarch;
 }
 
 void
 _initialize_m32r_tdep (void)
 {
   register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init);
 }