Merge GDB 7.5.1

bfd/elf32-arm.c

 /* 32-bit ELF support for ARM
    Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
-   2008, 2009, 2010, 2011  Free Software Foundation, Inc.
+   2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
 
    This file is part of BFD, the Binary File Descriptor library.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
 #include "sysdep.h"
 #include <limits.h>
 
 #include "bfd.h"
+#include "bfd_stdint.h"
 #include "libiberty.h"
 #include "libbfd.h"
 #include "elf-bfd.h"
+#include "elf-nacl.h"
 #include "elf-vxworks.h"
 #include "elf/arm.h"
 
 /* Return the relocation section associated with NAME.  HTAB is the
    bfd's elf32_arm_link_hash_entry.  */
 #define RELOC_SECTION(HTAB, NAME) \
   ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
 
 /* Return size of a relocation entry.  HTAB is the bfd's
    elf32_arm_link_hash_entry.  */
@@ skipping 1942 matching lines @@
     char *command = elf_tdata (abfd)->core_command;
     int n = strlen (command);
 
     if (0 < n && command[n - 1] == ' ')
       command[n - 1] = '\0';
   }
 
   return TRUE;
 }
 
+static char *
+elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
+                                int note_type, ...)
+{
+  switch (note_type)
+    {
+    default:
+      return NULL;
+
+    case NT_PRPSINFO:
+      {
+        char data[124];
+        va_list ap;
+
+        va_start (ap, note_type);
+        memset (data, 0, sizeof (data));
+        strncpy (data + 28, va_arg (ap, const char *), 16);
+        strncpy (data + 44, va_arg (ap, const char *), 80);
+        va_end (ap);
+
+        return elfcore_write_note (abfd, buf, bufsiz,
+                                   "CORE", note_type, data, sizeof (data));
+      }
+
+    case NT_PRSTATUS:
+      {
+        char data[148];
+        va_list ap;
+        long pid;
+        int cursig;
+        const void *greg;
+
+        va_start (ap, note_type);
+        memset (data, 0, sizeof (data));
+        pid = va_arg (ap, long);
+        bfd_put_32 (abfd, pid, data + 24);
+        cursig = va_arg (ap, int);
+        bfd_put_16 (abfd, cursig, data + 12);
+        greg = va_arg (ap, const void *);
+        memcpy (data + 72, greg, 72);
+        va_end (ap);
+
+        return elfcore_write_note (abfd, buf, bufsiz,
+                                   "CORE", note_type, data, sizeof (data));
+      }
+    }
+}
+
 #define TARGET_LITTLE_SYM               bfd_elf32_littlearm_vec
 #define TARGET_LITTLE_NAME              "elf32-littlearm"
 #define TARGET_BIG_SYM                  bfd_elf32_bigarm_vec
 #define TARGET_BIG_NAME                 "elf32-bigarm"
 
 #define elf_backend_grok_prstatus       elf32_arm_nabi_grok_prstatus
 #define elf_backend_grok_psinfo         elf32_arm_nabi_grok_psinfo
+#define elf_backend_write_core_note     elf32_arm_nabi_write_core_note
 
 typedef unsigned long int insn32;
 typedef unsigned short int insn16;
 
 /* In lieu of proper flags, assume all EABIv4 or later objects are
    interworkable.  */
 #define INTERWORK_FLAG(abfd)  \
   (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
   || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
   || ((abfd)->flags & BFD_LINKER_CREATED))
@@ skipping 14 matching lines @@
 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
 #define ARM_BX_GLUE_ENTRY_NAME   "__bx_r%d"
 
 #define STUB_ENTRY_NAME   "__%s_veneer"
 
 /* The name of the dynamic interpreter.  This is put in the .interp
    section.  */
 #define ELF_DYNAMIC_INTERPRETER     "/usr/lib/ld.so.1"
 
 static const unsigned long tls_trampoline [] =
-  {
-    0xe08e0000,         /* add r0, lr, r0 */
-    0xe5901004,         /* ldr r1, [r0,#4] */
-    0xe12fff11,         /* bx  r1 */
-  };
+{
+  0xe08e0000,           /* add r0, lr, r0 */
+  0xe5901004,           /* ldr r1, [r0,#4] */
+  0xe12fff11,           /* bx  r1 */
+};
 
 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
-  {
-    0xe52d2004, /*      push    {r2}                    */
-    0xe59f200c, /*      ldr     r2, [pc, #3f - . - 8]   */
-    0xe59f100c, /*      ldr     r1, [pc, #4f - . - 8]   */
-    0xe79f2002, /* 1:   ldr     r2, [pc, r2]            */
-    0xe081100f, /* 2:   add     r1, pc                  */
-    0xe12fff12, /*      bx      r2                      */
-    0x00000014, /* 3:   .word  _GLOBAL_OFFSET_TABLE_ - 1b - 8
+{
+  0xe52d2004, /*        push    {r2}                    */
+  0xe59f200c, /*      ldr     r2, [pc, #3f - . - 8]     */
+  0xe59f100c, /*      ldr     r1, [pc, #4f - . - 8]     */
+  0xe79f2002, /* 1:   ldr     r2, [pc, r2]              */
+  0xe081100f, /* 2:   add     r1, pc                    */
+  0xe12fff12, /*      bx      r2                        */
+  0x00000014, /* 3:   .word  _GLOBAL_OFFSET_TABLE_ - 1b - 8
                                 + dl_tlsdesc_lazy_resolver(GOT)   */
-    0x00000018, /* 4:   .word  _GLOBAL_OFFSET_TABLE_ - 2b - 8 */ 
-  };
+  0x00000018, /* 4:   .word  _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
+};
 
 #ifdef FOUR_WORD_PLT
 
 /* The first entry in a procedure linkage table looks like
    this.  It is set up so that any shared library function that is
    called before the relocation has been set up calls the dynamic
    linker first.  */
 static const bfd_vma elf32_arm_plt0_entry [] =
-  {
-    0xe52de004,         /* str   lr, [sp, #-4]! */
-    0xe59fe010,         /* ldr   lr, [pc, #16]  */
-    0xe08fe00e,         /* add   lr, pc, lr     */
-    0xe5bef008,         /* ldr   pc, [lr, #8]!  */
-  };
+{
+  0xe52de004,           /* str   lr, [sp, #-4]! */
+  0xe59fe010,           /* ldr   lr, [pc, #16]  */
+  0xe08fe00e,           /* add   lr, pc, lr     */
+  0xe5bef008,           /* ldr   pc, [lr, #8]!  */
+};
 
 /* Subsequent entries in a procedure linkage table look like
    this.  */
 static const bfd_vma elf32_arm_plt_entry [] =
-  {
-    0xe28fc600,         /* add   ip, pc, #NN    */
-    0xe28cca00,         /* add   ip, ip, #NN    */
-    0xe5bcf000,         /* ldr   pc, [ip, #NN]! */
-    0x00000000,         /* unused               */
-  };
+{
+  0xe28fc600,           /* add   ip, pc, #NN    */
+  0xe28cca00,           /* add   ip, ip, #NN    */
+  0xe5bcf000,           /* ldr   pc, [ip, #NN]! */
+  0x00000000,           /* unused               */
+};
 
 #else
 
 /* The first entry in a procedure linkage table looks like
    this.  It is set up so that any shared library function that is
    called before the relocation has been set up calls the dynamic
    linker first.  */
 static const bfd_vma elf32_arm_plt0_entry [] =
-  {
-    0xe52de004,         /* str   lr, [sp, #-4]! */
-    0xe59fe004,         /* ldr   lr, [pc, #4]   */
-    0xe08fe00e,         /* add   lr, pc, lr     */
-    0xe5bef008,         /* ldr   pc, [lr, #8]!  */
-    0x00000000,         /* &GOT[0] - .          */
-  };
+{
+  0xe52de004,           /* str   lr, [sp, #-4]! */
+  0xe59fe004,           /* ldr   lr, [pc, #4]   */
+  0xe08fe00e,           /* add   lr, pc, lr     */
+  0xe5bef008,           /* ldr   pc, [lr, #8]!  */
+  0x00000000,           /* &GOT[0] - .          */
+};
 
 /* Subsequent entries in a procedure linkage table look like
    this.  */
 static const bfd_vma elf32_arm_plt_entry [] =
-  {
-    0xe28fc600,         /* add   ip, pc, #0xNN00000 */
-    0xe28cca00,         /* add   ip, ip, #0xNN000   */
-    0xe5bcf000,         /* ldr   pc, [ip, #0xNNN]!  */
-  };
+{
+  0xe28fc600,           /* add   ip, pc, #0xNN00000 */
+  0xe28cca00,           /* add   ip, ip, #0xNN000   */
+  0xe5bcf000,           /* ldr   pc, [ip, #0xNNN]!  */
+};
 
 #endif
 
 /* The format of the first entry in the procedure linkage table
    for a VxWorks executable.  */
 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
-  {
-    0xe52dc008,         /* str    ip,[sp,#-8]!                  */
-    0xe59fc000,         /* ldr    ip,[pc]                       */
-    0xe59cf008,         /* ldr    pc,[ip,#8]                    */
-    0x00000000,         /* .long  _GLOBAL_OFFSET_TABLE_         */
-  };
+{
+  0xe52dc008,           /* str    ip,[sp,#-8]!                  */
+  0xe59fc000,           /* ldr    ip,[pc]                       */
+  0xe59cf008,           /* ldr    pc,[ip,#8]                    */
+  0x00000000,           /* .long  _GLOBAL_OFFSET_TABLE_         */
+};
 
 /* The format of subsequent entries in a VxWorks executable.  */
 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
-  {
-    0xe59fc000,         /* ldr    ip,[pc]                       */
-    0xe59cf000,         /* ldr    pc,[ip]                       */
-    0x00000000,         /* .long  @got                          */
-    0xe59fc000,         /* ldr    ip,[pc]                       */
-    0xea000000,         /* b      _PLT                          */
-    0x00000000,         /* .long  @pltindex*sizeof(Elf32_Rela)  */
-  };
+{
+  0xe59fc000,         /* ldr    ip,[pc]                 */
+  0xe59cf000,         /* ldr    pc,[ip]                 */
+  0x00000000,         /* .long  @got                            */
+  0xe59fc000,         /* ldr    ip,[pc]                 */
+  0xea000000,         /* b      _PLT                            */
+  0x00000000,         /* .long  @pltindex*sizeof(Elf32_Rela)    */
+};
 
 /* The format of entries in a VxWorks shared library.  */
 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
-  {
-    0xe59fc000,         /* ldr    ip,[pc]                       */
-    0xe79cf009,         /* ldr    pc,[ip,r9]                    */
-    0x00000000,         /* .long  @got                          */
-    0xe59fc000,         /* ldr    ip,[pc]                       */
-    0xe599f008,         /* ldr    pc,[r9,#8]                    */
-    0x00000000,         /* .long  @pltindex*sizeof(Elf32_Rela)  */
-  };
+{
+  0xe59fc000,         /* ldr    ip,[pc]                 */
+  0xe79cf009,         /* ldr    pc,[ip,r9]                      */
+  0x00000000,         /* .long  @got                            */
+  0xe59fc000,         /* ldr    ip,[pc]                 */
+  0xe599f008,         /* ldr    pc,[r9,#8]                      */
+  0x00000000,         /* .long  @pltindex*sizeof(Elf32_Rela)    */
+};
 
 /* An initial stub used if the PLT entry is referenced from Thumb code.  */
 #define PLT_THUMB_STUB_SIZE 4
 static const bfd_vma elf32_arm_plt_thumb_stub [] =
-  {
-    0x4778,             /* bx pc */
-    0x46c0              /* nop   */
-  };
+{
+  0x4778,               /* bx pc */
+  0x46c0                /* nop   */
+};
 
 /* The entries in a PLT when using a DLL-based target with multiple
    address spaces.  */
 static const bfd_vma elf32_arm_symbian_plt_entry [] =
-  {
-    0xe51ff004,         /* ldr   pc, [pc, #-4] */
-    0x00000000,         /* dcd   R_ARM_GLOB_DAT(X) */
-  };
+{
+  0xe51ff004,         /* ldr   pc, [pc, #-4] */
+  0x00000000,         /* dcd   R_ARM_GLOB_DAT(X) */
+};
+
+/* The first entry in a procedure linkage table looks like
+   this.  It is set up so that any shared library function that is
+   called before the relocation has been set up calls the dynamic
+   linker first.  */
+static const bfd_vma elf32_arm_nacl_plt0_entry [] =
+{
+  /* First bundle: */
+  0xe300c000,           /* movw ip, #:lower16:&GOT[2]-.+8       */
+  0xe340c000,           /* movt ip, #:upper16:&GOT[2]-.+8       */
+  0xe08cc00f,           /* add  ip, ip, pc                      */
+  0xe52dc008,           /* str  ip, [sp, #-8]!                  */
+  /* Second bundle: */
+  0xe7dfcf1f,   /* bfc  ip, #30, #2                     */
+  0xe59cc000,   /* ldr  ip, [ip]                        */
+  0xe3ccc13f,           /* bic  ip, ip, #0xc000000f             */
+  0xe12fff1c,   /* bx   ip                              */
+  /* Third bundle: */
+  0xe320f000,   /* nop                                  */
+  0xe320f000,   /* nop                                  */
+  0xe320f000,   /* nop                                  */
+  /* .Lplt_tail: */
+  0xe50dc004,           /* str  ip, [sp, #-4]                   */
+  /* Fourth bundle: */
+  0xe7dfcf1f,           /* bfc  ip, #30, #2                     */
+  0xe59cc000,   /* ldr  ip, [ip]                        */
+  0xe3ccc13f,           /* bic  ip, ip, #0xc000000f             */
+  0xe12fff1c,   /* bx   ip                              */
+};
+#define ARM_NACL_PLT_TAIL_OFFSET        (11 * 4)
+
+/* Subsequent entries in a procedure linkage table look like this.  */
+static const bfd_vma elf32_arm_nacl_plt_entry [] =
+{
+  0xe300c000,           /* movw ip, #:lower16:&GOT[n]-.+8       */
+  0xe340c000,           /* movt ip, #:upper16:&GOT[n]-.+8       */
+  0xe08cc00f,           /* add  ip, ip, pc                      */
+  0xea000000,           /* b    .Lplt_tail                      */
+};
 
 #define ARM_MAX_FWD_BRANCH_OFFSET  ((((1 << 23) - 1) << 2) + 8)
 #define ARM_MAX_BWD_BRANCH_OFFSET  ((-((1 << 23) << 2)) + 8)
 #define THM_MAX_FWD_BRANCH_OFFSET  ((1 << 22) -2 + 4)
 #define THM_MAX_BWD_BRANCH_OFFSET  (-(1 << 22) + 4)
 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
 
 enum stub_insn_type
-  {
-    THUMB16_TYPE = 1,
-    THUMB32_TYPE,
-    ARM_TYPE,
-    DATA_TYPE
-  };
+{
+  THUMB16_TYPE = 1,
+  THUMB32_TYPE,
+  ARM_TYPE,
+  DATA_TYPE
+};
 
 #define THUMB16_INSN(X)         {(X), THUMB16_TYPE, R_ARM_NONE, 0}
 /* A bit of a hack.  A Thumb conditional branch, in which the proper condition
    is inserted in arm_build_one_stub().  */
 #define THUMB16_BCOND_INSN(X)   {(X), THUMB16_TYPE, R_ARM_NONE, 1}
 #define THUMB32_INSN(X)         {(X), THUMB32_TYPE, R_ARM_NONE, 0}
 #define THUMB32_B_INSN(X, Z)    {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
 #define ARM_INSN(X)             {(X), ARM_TYPE, R_ARM_NONE, 0}
 #define ARM_REL_INSN(X, Z)      {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
 #define DATA_WORD(X,Y,Z)        {(X), DATA_TYPE, (Y), (Z)}
 
 typedef struct
 {
-  bfd_vma data;
-  enum stub_insn_type type;
-  unsigned int r_type;
-  int reloc_addend;
+  bfd_vma              data;
+  enum stub_insn_type  type;
+  unsigned int         r_type;
+  int                  reloc_addend;
 }  insn_sequence;
 
 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
    to reach the stub if necessary.  */
 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
-  {
-    ARM_INSN(0xe51ff004),            /* ldr   pc, [pc, #-4] */
-    DATA_WORD(0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
-  };
+{
+  ARM_INSN (0xe51ff004),            /* ldr   pc, [pc, #-4] */
+  DATA_WORD (0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
+};
 
 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
    available.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
-  {
-    ARM_INSN(0xe59fc000),            /* ldr   ip, [pc, #0] */
-    ARM_INSN(0xe12fff1c),            /* bx    ip */
-    DATA_WORD(0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
-  };
+{
+  ARM_INSN (0xe59fc000),            /* ldr   ip, [pc, #0] */
+  ARM_INSN (0xe12fff1c),            /* bx    ip */
+  DATA_WORD (0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
+};
 
 /* Thumb -> Thumb long branch stub. Used on M-profile architectures.  */
 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
-  {
-    THUMB16_INSN(0xb401),             /* push {r0} */
-    THUMB16_INSN(0x4802),             /* ldr  r0, [pc, #8] */
-    THUMB16_INSN(0x4684),             /* mov  ip, r0 */
-    THUMB16_INSN(0xbc01),             /* pop  {r0} */
-    THUMB16_INSN(0x4760),             /* bx   ip */
-    THUMB16_INSN(0xbf00),             /* nop */
-    DATA_WORD(0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
-  };
+{
+  THUMB16_INSN (0xb401),             /* push {r0} */
+  THUMB16_INSN (0x4802),             /* ldr  r0, [pc, #8] */
+  THUMB16_INSN (0x4684),             /* mov  ip, r0 */
+  THUMB16_INSN (0xbc01),             /* pop  {r0} */
+  THUMB16_INSN (0x4760),             /* bx   ip */
+  THUMB16_INSN (0xbf00),             /* nop */
+  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
+};
 
 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
    allowed.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
-  {
-    THUMB16_INSN(0x4778),             /* bx   pc */
-    THUMB16_INSN(0x46c0),             /* nop */
-    ARM_INSN(0xe59fc000),             /* ldr  ip, [pc, #0] */
-    ARM_INSN(0xe12fff1c),             /* bx   ip */
-    DATA_WORD(0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
-  };
+{
+  THUMB16_INSN (0x4778),             /* bx   pc */
+  THUMB16_INSN (0x46c0),             /* nop */
+  ARM_INSN (0xe59fc000),             /* ldr  ip, [pc, #0] */
+  ARM_INSN (0xe12fff1c),             /* bx   ip */
+  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
+};
 
 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
    available.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
-  {
-    THUMB16_INSN(0x4778),             /* bx   pc */
-    THUMB16_INSN(0x46c0),             /* nop   */
-    ARM_INSN(0xe51ff004),             /* ldr   pc, [pc, #-4] */
-    DATA_WORD(0, R_ARM_ABS32, 0),     /* dcd   R_ARM_ABS32(X) */
-  };
+{
+  THUMB16_INSN (0x4778),             /* bx   pc */
+  THUMB16_INSN (0x46c0),             /* nop   */
+  ARM_INSN (0xe51ff004),             /* ldr   pc, [pc, #-4] */
+  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd   R_ARM_ABS32(X) */
+};
 
 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
    one, when the destination is close enough.  */
 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
-  {
-    THUMB16_INSN(0x4778),             /* bx   pc */
-    THUMB16_INSN(0x46c0),             /* nop   */
-    ARM_REL_INSN(0xea000000, -8),     /* b    (X-8) */
-  };
+{
+  THUMB16_INSN (0x4778),             /* bx   pc */
+  THUMB16_INSN (0x46c0),             /* nop   */
+  ARM_REL_INSN (0xea000000, -8),     /* b    (X-8) */
+};
 
 /* ARM/Thumb -> ARM long branch stub, PIC.  On V5T and above, use
    blx to reach the stub if necessary.  */
 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
-  {
-    ARM_INSN(0xe59fc000),             /* ldr   ip, [pc] */
-    ARM_INSN(0xe08ff00c),             /* add   pc, pc, ip */
-    DATA_WORD(0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
-  };
+{
+  ARM_INSN (0xe59fc000),             /* ldr   ip, [pc] */
+  ARM_INSN (0xe08ff00c),             /* add   pc, pc, ip */
+  DATA_WORD (0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
+};
 
 /* ARM/Thumb -> Thumb long branch stub, PIC.  On V5T and above, use
    blx to reach the stub if necessary.  We can not add into pc;
    it is not guaranteed to mode switch (different in ARMv6 and
    ARMv7).  */
 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
-  {
-    ARM_INSN(0xe59fc004),             /* ldr   ip, [pc, #4] */
-    ARM_INSN(0xe08fc00c),             /* add   ip, pc, ip */
-    ARM_INSN(0xe12fff1c),             /* bx    ip */
-    DATA_WORD(0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
-  };
+{
+  ARM_INSN (0xe59fc004),             /* ldr   ip, [pc, #4] */
+  ARM_INSN (0xe08fc00c),             /* add   ip, pc, ip */
+  ARM_INSN (0xe12fff1c),             /* bx    ip */
+  DATA_WORD (0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
+};
 
 /* V4T ARM -> ARM long branch stub, PIC.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
-  {
-    ARM_INSN(0xe59fc004),             /* ldr   ip, [pc, #4] */
-    ARM_INSN(0xe08fc00c),             /* add   ip, pc, ip */
-    ARM_INSN(0xe12fff1c),             /* bx    ip */
-    DATA_WORD(0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
-  };
+{
+  ARM_INSN (0xe59fc004),             /* ldr   ip, [pc, #4] */
+  ARM_INSN (0xe08fc00c),             /* add   ip, pc, ip */
+  ARM_INSN (0xe12fff1c),             /* bx    ip */
+  DATA_WORD (0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
+};
 
 /* V4T Thumb -> ARM long branch stub, PIC.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
-  {
-    THUMB16_INSN(0x4778),             /* bx   pc */
-    THUMB16_INSN(0x46c0),             /* nop  */
-    ARM_INSN(0xe59fc000),             /* ldr  ip, [pc, #0] */
-    ARM_INSN(0xe08cf00f),             /* add  pc, ip, pc */
-    DATA_WORD(0, R_ARM_REL32, -4),     /* dcd  R_ARM_REL32(X) */
-  };
+{
+  THUMB16_INSN (0x4778),             /* bx   pc */
+  THUMB16_INSN (0x46c0),             /* nop  */
+  ARM_INSN (0xe59fc000),             /* ldr  ip, [pc, #0] */
+  ARM_INSN (0xe08cf00f),             /* add  pc, ip, pc */
+  DATA_WORD (0, R_ARM_REL32, -4),     /* dcd  R_ARM_REL32(X) */
+};
 
 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
    architectures.  */
 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
-  {
-    THUMB16_INSN(0xb401),             /* push {r0} */
-    THUMB16_INSN(0x4802),             /* ldr  r0, [pc, #8] */
-    THUMB16_INSN(0x46fc),             /* mov  ip, pc */
-    THUMB16_INSN(0x4484),             /* add  ip, r0 */
-    THUMB16_INSN(0xbc01),             /* pop  {r0} */
-    THUMB16_INSN(0x4760),             /* bx   ip */
-    DATA_WORD(0, R_ARM_REL32, 4),     /* dcd  R_ARM_REL32(X) */
-  };
+{
+  THUMB16_INSN (0xb401),             /* push {r0} */
+  THUMB16_INSN (0x4802),             /* ldr  r0, [pc, #8] */
+  THUMB16_INSN (0x46fc),             /* mov  ip, pc */
+  THUMB16_INSN (0x4484),             /* add  ip, r0 */
+  THUMB16_INSN (0xbc01),             /* pop  {r0} */
+  THUMB16_INSN (0x4760),             /* bx   ip */
+  DATA_WORD (0, R_ARM_REL32, 4),     /* dcd  R_ARM_REL32(X) */
+};
 
 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
    allowed.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
-  {
-    THUMB16_INSN(0x4778),             /* bx   pc */
-    THUMB16_INSN(0x46c0),             /* nop */
-    ARM_INSN(0xe59fc004),             /* ldr  ip, [pc, #4] */
-    ARM_INSN(0xe08fc00c),             /* add   ip, pc, ip */
-    ARM_INSN(0xe12fff1c),             /* bx   ip */
-    DATA_WORD(0, R_ARM_REL32, 0),     /* dcd  R_ARM_REL32(X) */
-  };
+{
+  THUMB16_INSN (0x4778),             /* bx   pc */
+  THUMB16_INSN (0x46c0),             /* nop */
+  ARM_INSN (0xe59fc004),             /* ldr  ip, [pc, #4] */
+  ARM_INSN (0xe08fc00c),             /* add   ip, pc, ip */
+  ARM_INSN (0xe12fff1c),             /* bx   ip */
+  DATA_WORD (0, R_ARM_REL32, 0),     /* dcd  R_ARM_REL32(X) */
+};
 
 /* Thumb2/ARM -> TLS trampoline.  Lowest common denominator, which is a
    long PIC stub.  We can use r1 as a scratch -- and cannot use ip.  */
 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
 {
-    ARM_INSN(0xe59f1000),             /* ldr   r1, [pc] */
-    ARM_INSN(0xe08ff001),             /* add   pc, pc, r1 */
-    DATA_WORD(0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
+  ARM_INSN (0xe59f1000),             /* ldr   r1, [pc] */
+  ARM_INSN (0xe08ff001),             /* add   pc, pc, r1 */
+  DATA_WORD (0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
 };
 
 /* V4T Thumb -> TLS trampoline.  lowest common denominator, which is a
    long PIC stub.  We can use r1 as a scratch -- and cannot use ip.  */
 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
 {
-    THUMB16_INSN(0x4778),             /* bx   pc */
-    THUMB16_INSN(0x46c0),             /* nop */
-    ARM_INSN(0xe59f1000),             /* ldr  r1, [pc, #0] */
-    ARM_INSN(0xe081f00f),             /* add  pc, r1, pc */
-    DATA_WORD(0, R_ARM_REL32, -4),    /* dcd  R_ARM_REL32(X) */
+  THUMB16_INSN (0x4778),             /* bx   pc */
+  THUMB16_INSN (0x46c0),             /* nop */
+  ARM_INSN (0xe59f1000),             /* ldr  r1, [pc, #0] */
+  ARM_INSN (0xe081f00f),             /* add  pc, r1, pc */
+  DATA_WORD (0, R_ARM_REL32, -4),    /* dcd  R_ARM_REL32(X) */
 };
 
 /* Cortex-A8 erratum-workaround stubs.  */
 
 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
    can't use a conditional branch to reach this stub).  */
 
 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
-  {
-    THUMB16_BCOND_INSN(0xd001),         /* b<cond>.n true.  */
-    THUMB32_B_INSN(0xf000b800, -4),     /* b.w insn_after_original_branch.  */
-    THUMB32_B_INSN(0xf000b800, -4)      /* true: b.w original_branch_dest.  */
-  };
+{
+  THUMB16_BCOND_INSN (0xd001),         /* b<cond>.n true.  */
+  THUMB32_B_INSN (0xf000b800, -4),     /* b.w insn_after_original_branch.  */
+  THUMB32_B_INSN (0xf000b800, -4)      /* true: b.w original_branch_dest.  */
+};
 
 /* Stub used for b.w and bl.w instructions.  */
 
 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
-  {
-    THUMB32_B_INSN(0xf000b800, -4)      /* b.w original_branch_dest.  */
-  };
+{
+  THUMB32_B_INSN (0xf000b800, -4)       /* b.w original_branch_dest.  */
+};
 
 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
-  {
-    THUMB32_B_INSN(0xf000b800, -4)      /* b.w original_branch_dest.  */
-  };
+{
+  THUMB32_B_INSN (0xf000b800, -4)       /* b.w original_branch_dest.  */
+};
 
 /* Stub used for Thumb-2 blx.w instructions.  We modified the original blx.w
    instruction (which switches to ARM mode) to point to this stub.  Jump to the
    real destination using an ARM-mode branch.  */
 
 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
-  {
-    ARM_REL_INSN(0xea000000, -8)        /* b original_branch_dest.  */
-  };
+{
+  ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest.  */
+};
 
 /* For each section group there can be a specially created linker section
    to hold the stubs for that group.  The name of the stub section is based
    upon the name of another section within that group with the suffix below
    applied.
 
    PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
    create what appeared to be a linker stub section when it actually
    contained user code/data.  For example, consider this fragment:
-   
+
      const char * stubborn_problems[] = { "np" };
 
    If this is compiled with "-fPIC -fdata-sections" then gcc produces a
    section called:
 
      .data.rel.local.stubborn_problems
 
    This then causes problems in arm32_arm_build_stubs() as it triggers:
 
       // Ignore non-stub sections.
@@ skipping 20 matching lines @@
   DEF_STUB(long_branch_v4t_thumb_arm_pic) \
   DEF_STUB(long_branch_thumb_only_pic) \
   DEF_STUB(long_branch_any_tls_pic) \
   DEF_STUB(long_branch_v4t_thumb_tls_pic) \
   DEF_STUB(a8_veneer_b_cond) \
   DEF_STUB(a8_veneer_b) \
   DEF_STUB(a8_veneer_bl) \
   DEF_STUB(a8_veneer_blx)
 
 #define DEF_STUB(x) arm_stub_##x,
-enum elf32_arm_stub_type {
+enum elf32_arm_stub_type
+{
   arm_stub_none,
   DEF_STUBS
   /* Note the first a8_veneer type */
   arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
 };
 #undef DEF_STUB
 
 typedef struct
 {
   const insn_sequence* template_sequence;
   int template_size;
 } stub_def;
 
 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
-static const stub_def stub_definitions[] = {
+static const stub_def stub_definitions[] =
+{
   {NULL, 0},
   DEF_STUBS
 };
 
 struct elf32_arm_stub_hash_entry
 {
   /* Base hash table entry structure.  */
   struct bfd_hash_entry root;
 
   /* The stub section.  */
@@ skipping 132 matching lines @@
 
 #define elf32_arm_section_data(sec) \
   ((_arm_elf_section_data *) elf_section_data (sec))
 
 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
    These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
    so may be created multiple times: we use an array of these entries whilst
    relaxing which we can refresh easily, then create stubs for each potentially
    erratum-triggering instruction once we've settled on a solution.  */
 
-struct a8_erratum_fix {
+struct a8_erratum_fix
+{
   bfd *input_bfd;
   asection *section;
   bfd_vma offset;
   bfd_vma addend;
   unsigned long orig_insn;
   char *stub_name;
   enum elf32_arm_stub_type stub_type;
   enum arm_st_branch_type branch_type;
 };
 
 /* A table of relocs applied to branches which might trigger Cortex-A8
    erratum.  */
 
-struct a8_erratum_reloc {
+struct a8_erratum_reloc
+{
   bfd_vma from;
   bfd_vma destination;
   struct elf32_arm_link_hash_entry *hash;
   const char *sym_name;
   unsigned int r_type;
   enum arm_st_branch_type branch_type;
   bfd_boolean non_a8_stub;
 };
 
 /* The size of the thread control block.  */
 #define TCB_SIZE        8
 
 /* ARM-specific information about a PLT entry, over and above the usual
    gotplt_union.  */
-struct arm_plt_info {
+struct arm_plt_info
+{
   /* We reference count Thumb references to a PLT entry separately,
      so that we can emit the Thumb trampoline only if needed.  */
   bfd_signed_vma thumb_refcount;
 
   /* Some references from Thumb code may be eliminated by BL->BLX
      conversion, so record them separately.  */
   bfd_signed_vma maybe_thumb_refcount;
 
   /* How many of the recorded PLT accesses were from non-call relocations.
      This information is useful when deciding whether anything takes the
      address of an STT_GNU_IFUNC PLT.  A value of 0 means that all
      non-call references to the function should resolve directly to the
      real runtime target.  */
   unsigned int noncall_refcount;
 
   /* Since PLT entries have variable size if the Thumb prologue is
      used, we need to record the index into .got.plt instead of
      recomputing it from the PLT offset.  */
   bfd_signed_vma got_offset;
 };
 
 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol.  */
-struct arm_local_iplt_info {
+struct arm_local_iplt_info
+{
   /* The information that is usually found in the generic ELF part of
      the hash table entry.  */
   union gotplt_union root;
 
   /* The information that is usually found in the ARM-specific part of
      the hash table entry.  */
   struct arm_plt_info arm;
 
   /* A list of all potential dynamic relocations against this symbol.  */
   struct elf_dyn_relocs *dyn_relocs;
@@ skipping 40 matching lines @@
 elf32_arm_mkobject (bfd *abfd)
 {
   return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
                                   ARM_ELF_DATA);
 }
 
 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
 
 /* Arm ELF linker hash entry.  */
 struct elf32_arm_link_hash_entry
-  {
-    struct elf_link_hash_entry root;
+{
+  struct elf_link_hash_entry root;
 
-    /* Track dynamic relocs copied for this symbol.  */
-    struct elf_dyn_relocs *dyn_relocs;
+  /* Track dynamic relocs copied for this symbol.  */
+  struct elf_dyn_relocs *dyn_relocs;
 
-    /* ARM-specific PLT information.  */
-    struct arm_plt_info plt;
+  /* ARM-specific PLT information.  */
+  struct arm_plt_info plt;
 
 #define GOT_UNKNOWN     0
 #define GOT_NORMAL      1
 #define GOT_TLS_GD      2
 #define GOT_TLS_IE      4
 #define GOT_TLS_GDESC   8
 #define GOT_TLS_GD_ANY_P(type)  ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
-    unsigned int tls_type : 8;
+  unsigned int tls_type : 8;
 
-    /* True if the symbol's PLT entry is in .iplt rather than .plt.  */
-    unsigned int is_iplt : 1;
+  /* True if the symbol's PLT entry is in .iplt rather than .plt.  */
+  unsigned int is_iplt : 1;
 
-    unsigned int unused : 23;
+  unsigned int unused : 23;
 
-    /* Offset of the GOTPLT entry reserved for the TLS descriptor,
-       starting at the end of the jump table.  */
-    bfd_vma tlsdesc_got;
+  /* Offset of the GOTPLT entry reserved for the TLS descriptor,
+     starting at the end of the jump table.  */
+  bfd_vma tlsdesc_got;
 
-    /* The symbol marking the real symbol location for exported thumb
-       symbols with Arm stubs.  */
-    struct elf_link_hash_entry *export_glue;
+  /* The symbol marking the real symbol location for exported thumb
+     symbols with Arm stubs.  */
+  struct elf_link_hash_entry *export_glue;
 
-   /* A pointer to the most recently used stub hash entry against this
+  /* A pointer to the most recently used stub hash entry against this
      symbol.  */
-    struct elf32_arm_stub_hash_entry *stub_cache;
-  };
+  struct elf32_arm_stub_hash_entry *stub_cache;
+};
 
 /* Traverse an arm ELF linker hash table.  */
 #define elf32_arm_link_hash_traverse(table, func, info)                 \
   (elf_link_hash_traverse                                               \
    (&(table)->root,                                                     \
     (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func),    \
     (info)))
 
 /* Get the ARM elf linker hash table from a link_info structure.  */
 #define elf32_arm_hash_table(info) \
@@ skipping 89 matching lines @@
 
   /* The number of bytes in the subsequent PLT etries.  */
   bfd_size_type plt_entry_size;
 
   /* True if the target system is VxWorks.  */
   int vxworks_p;
 
   /* True if the target system is Symbian OS.  */
   int symbian_p;
 
+  /* True if the target system is Native Client.  */
+  int nacl_p;
+
   /* True if the target uses REL relocations.  */
   int use_rel;
 
   /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt.  */
   bfd_vma next_tls_desc_index;
 
   /* How many R_ARM_TLS_DESC relocations were generated so far.  */
   bfd_vma num_tls_desc;
 
   /* Short-cuts to get to dynamic linker sections.  */
   asection *sdynbss;
   asection *srelbss;
 
   /* The (unloaded but important) VxWorks .rela.plt.unloaded section.  */
   asection *srelplt2;
 
   /* The offset into splt of the PLT entry for the TLS descriptor
      resolver.  Special values are 0, if not necessary (or not found
      to be necessary yet), and -1 if needed but not determined
      yet.  */
   bfd_vma dt_tlsdesc_plt;
 
   /* The offset into sgot of the GOT entry used by the PLT entry
      above.  */
-  bfd_vma dt_tlsdesc_got;    
+  bfd_vma dt_tlsdesc_got;
 
   /* Offset in .plt section of tls_arm_trampoline.  */
   bfd_vma tls_trampoline;
 
   /* Data for R_ARM_TLS_LDM32 relocations.  */
   union
   {
     bfd_signed_vma refcount;
     bfd_vma offset;
   } tls_ldm_got;
@@ skipping 275 matching lines @@
 /* Create the .iplt, .rel(a).iplt and .igot.plt sections.  */
 
 static bfd_boolean
 create_ifunc_sections (struct bfd_link_info *info)
 {
   struct elf32_arm_link_hash_table *htab;
   const struct elf_backend_data *bed;
   bfd *dynobj;
   asection *s;
   flagword flags;
-  
+
   htab = elf32_arm_hash_table (info);
   dynobj = htab->root.dynobj;
   bed = get_elf_backend_data (dynobj);
   flags = bed->dynamic_sec_flags;
 
   if (htab->root.iplt == NULL)
     {
-      s = bfd_make_section_with_flags (dynobj, ".iplt",
-                                       flags | SEC_READONLY | SEC_CODE);
+      s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
+                                              flags | SEC_READONLY | SEC_CODE);
       if (s == NULL
-          || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
+          || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
         return FALSE;
       htab->root.iplt = s;
     }
 
   if (htab->root.irelplt == NULL)
     {
-      s = bfd_make_section_with_flags (dynobj, RELOC_SECTION (htab, ".iplt"),
-                                       flags | SEC_READONLY);
+      s = bfd_make_section_anyway_with_flags (dynobj,
+                                              RELOC_SECTION (htab, ".iplt"),
+                                              flags | SEC_READONLY);
       if (s == NULL
-          || !bfd_set_section_alignment (abfd, s, bed->s->log_file_align))
+          || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
         return FALSE;
       htab->root.irelplt = s;
     }
 
   if (htab->root.igotplt == NULL)
     {
-      s = bfd_make_section_with_flags (dynobj, ".igot.plt", flags);
+      s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
       if (s == NULL
           || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
         return FALSE;
       htab->root.igotplt = s;
     }
   return TRUE;
 }
 
 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
    .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
    hash table.  */
 
 static bfd_boolean
 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
 {
   struct elf32_arm_link_hash_table *htab;
 
   htab = elf32_arm_hash_table (info);
   if (htab == NULL)
     return FALSE;
 
   if (!htab->root.sgot && !create_got_section (dynobj, info))
     return FALSE;
 
   if (!_bfd_elf_create_dynamic_sections (dynobj, info))
     return FALSE;
 
-  htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
+  htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
   if (!info->shared)
-    htab->srelbss = bfd_get_section_by_name (dynobj,
-                                             RELOC_SECTION (htab, ".bss"));
+    htab->srelbss = bfd_get_linker_section (dynobj,
+                                            RELOC_SECTION (htab, ".bss"));
 
   if (htab->vxworks_p)
     {
       if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
         return FALSE;
 
       if (info->shared)
         {
           htab->plt_header_size = 0;
           htab->plt_entry_size
@@ skipping 130 matching lines @@
   ret->plt_header_size = 16;
   ret->plt_entry_size = 16;
 #else
   ret->plt_header_size = 20;
   ret->plt_entry_size = 12;
 #endif
   ret->fix_v4bx = 0;
   ret->use_blx = 0;
   ret->vxworks_p = 0;
   ret->symbian_p = 0;
+  ret->nacl_p = 0;
   ret->use_rel = 1;
   ret->sym_cache.abfd = NULL;
   ret->obfd = abfd;
   ret->tls_ldm_got.refcount = 0;
   ret->stub_bfd = NULL;
   ret->add_stub_section = NULL;
   ret->layout_sections_again = NULL;
   ret->stub_group = NULL;
   ret->top_id = 0;
   ret->bfd_count = 0;
@@ skipping 148 matching lines @@
                                  &root_plt, &arm_plt)
       && root_plt->offset != (bfd_vma) -1)
     {
       asection *splt;
 
       if (hash == NULL || hash->is_iplt)
         splt = globals->root.iplt;
       else
         splt = globals->root.splt;
       if (splt != NULL)
-        {       
+        {
           use_plt = 1;
 
           /* Note when dealing with PLT entries: the main PLT stub is in
              ARM mode, so if the branch is in Thumb mode, another
              Thumb->ARM stub will be inserted later just before the ARM
              PLT stub. We don't take this extra distance into account
              here, because if a long branch stub is needed, we'll add a
              Thumb->Arm one and branch directly to the ARM PLT entry
              because it avoids spreading offset corrections in several
              places.  */
@@ skipping 263 matching lines @@
       if (h != NULL)
         h->stub_cache = stub_entry;
 
       free (stub_name);
     }
 
   return stub_entry;
 }
 
 /* Find or create a stub section.  Returns a pointer to the stub section, and
-   the section to which the stub section will be attached (in *LINK_SEC_P). 
+   the section to which the stub section will be attached (in *LINK_SEC_P).
    LINK_SEC_P may be NULL.  */
 
 static asection *
 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
                                    struct elf32_arm_link_hash_table *htab)
 {
   asection *link_sec;
   asection *stub_sec;
 
   link_sec = htab->stub_group[section->id].link_sec;
@@ skipping 17 matching lines @@
 
           memcpy (s_name, link_sec->name, namelen);
           memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
           stub_sec = (*htab->add_stub_section) (s_name, link_sec);
           if (stub_sec == NULL)
             return NULL;
           htab->stub_group[link_sec->id].stub_sec = stub_sec;
         }
       htab->stub_group[section->id].stub_sec = stub_sec;
     }
-  
+
   if (link_sec_p)
     *link_sec_p = link_sec;
-  
+
   return stub_sec;
 }
 
 /* Add a new stub entry to the stub hash.  Not all fields of the new
    stub entry are initialised.  */
 
 static struct elf32_arm_stub_hash_entry *
 elf32_arm_add_stub (const char *stub_name,
                     asection *section,
                     struct elf32_arm_link_hash_table *htab)
@@ skipping 47 matching lines @@
   if (htab->byteswap_code != bfd_little_endian (output_bfd))
     bfd_putl16 (val, ptr);
   else
     bfd_putb16 (val, ptr);
 }
 
 /* If it's possible to change R_TYPE to a more efficient access
    model, return the new reloc type.  */
 
 static unsigned
-elf32_arm_tls_transition (struct bfd_link_info *info, int r_type, 
+elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
                           struct elf_link_hash_entry *h)
 {
   int is_local = (h == NULL);
 
   if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
     return r_type;
 
-  /* We do not support relaxations for Old TLS models.  */ 
+  /* We do not support relaxations for Old TLS models.  */
   switch (r_type)
     {
     case R_ARM_TLS_GOTDESC:
     case R_ARM_TLS_CALL:
     case R_ARM_THM_TLS_CALL:
     case R_ARM_TLS_DESCSEQ:
     case R_ARM_THM_TLS_DESCSEQ:
       return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
     }
 
@@ skipping 25 matching lines @@
     case arm_stub_long_branch_any_arm_pic:
     case arm_stub_long_branch_any_thumb_pic:
     case arm_stub_long_branch_v4t_thumb_thumb_pic:
     case arm_stub_long_branch_v4t_arm_thumb_pic:
     case arm_stub_long_branch_v4t_thumb_arm_pic:
     case arm_stub_long_branch_thumb_only_pic:
     case arm_stub_long_branch_any_tls_pic:
     case arm_stub_long_branch_v4t_thumb_tls_pic:
     case arm_stub_a8_veneer_blx:
       return 4;
-    
+
     default:
       abort ();  /* Should be unreachable.  */
     }
 }
 
 static bfd_boolean
 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
                     void * in_arg)
 {
 #define MAXRELOCS 2
@@ skipping 517 matching lines @@
        section = section->next)
     {
       bfd_byte *contents = NULL;
       struct _arm_elf_section_data *sec_data;
       unsigned int span;
       bfd_vma base_vma;
 
       if (elf_section_type (section) != SHT_PROGBITS
           || (elf_section_flags (section) & SHF_EXECINSTR) == 0
           || (section->flags & SEC_EXCLUDE) != 0
-          || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
+          || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
           || (section->output_section == bfd_abs_section_ptr))
         continue;
 
       base_vma = section->output_section->vma + section->output_offset;
 
       if (elf_section_data (section)->this_hdr.contents != NULL)
         contents = elf_section_data (section)->this_hdr.contents;
       else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
         return TRUE;
 
@@ skipping 414 matching lines @@
                   r_indx = ELF32_R_SYM (irela->r_info);
 
                   if (r_type >= (unsigned int) R_ARM_max)
                     {
                       bfd_set_error (bfd_error_bad_value);
                     error_ret_free_internal:
                       if (elf_section_data (section)->relocs == NULL)
                         free (internal_relocs);
                       goto error_ret_free_local;
                     }
-                  
+
                   hash = NULL;
                   if (r_indx >= symtab_hdr->sh_info)
                     hash = elf32_arm_hash_entry
                       (elf_sym_hashes (input_bfd)
                        [r_indx - symtab_hdr->sh_info]);
-                  
+
                   /* Only look for stubs on branch instructions, or
                      non-relaxed TLSCALL  */
                   if ((r_type != (unsigned int) R_ARM_CALL)
                       && (r_type != (unsigned int) R_ARM_THM_CALL)
                       && (r_type != (unsigned int) R_ARM_JUMP24)
                       && (r_type != (unsigned int) R_ARM_THM_JUMP19)
                       && (r_type != (unsigned int) R_ARM_THM_XPC22)
                       && (r_type != (unsigned int) R_ARM_THM_JUMP24)
                       && (r_type != (unsigned int) R_ARM_PLT32)
                       && !((r_type == (unsigned int) R_ARM_TLS_CALL
                             || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
                            && r_type == elf32_arm_tls_transition
                                (info, r_type, &hash->root)
                            && ((hash ? hash->tls_type
                                 : (elf32_arm_local_got_tls_type
                                    (input_bfd)[r_indx]))
                                & GOT_TLS_GDESC) != 0))
                     continue;
 
                   /* Now determine the call target, its name, value,
                      section.  */
                   sym_sec = NULL;
                   sym_value = 0;
                   destination = 0;
                   sym_name = NULL;
-                  
+
                   if (r_type == (unsigned int) R_ARM_TLS_CALL
                       || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
                     {
                       /* A non-relaxed TLS call.  The target is the
                          plt-resident trampoline and nothing to do
                          with the symbol.  */
                       BFD_ASSERT (htab->tls_trampoline > 0);
                       sym_sec = htab->root.splt;
                       sym_value = htab->tls_trampoline;
                       hash = 0;
@@ skipping 524 matching lines @@
 /* Thumb->ARM:                          Thumb->(non-interworking aware) ARM
 
      .thumb                             .thumb
      .align 2                           .align 2
  __func_from_thumb:                 __func_from_thumb:
      bx pc                              push {r6, lr}
      nop                                ldr  r6, __func_addr
      .arm                               mov  lr, pc
      b func                             bx   r6
                                         .arm
-                                    ;; back_to_thumb       
+                                    ;; back_to_thumb
                                         ldmia r13! {r6, lr}
-                                        bx    lr           
+                                        bx    lr
                                     __func_addr:
                                         .word        func  */
 
 #define THUMB2ARM_GLUE_SIZE 8
 static const insn16 t2a1_bx_pc_insn = 0x4778;
 static const insn16 t2a2_noop_insn = 0x46c0;
 static const insn32 t2a3_b_insn = 0xea000000;
 
 #define VFP11_ERRATUM_VENEER_SIZE 8
 
 #define ARM_BX_VENEER_SIZE 12
 static const insn32 armbx1_tst_insn = 0xe3100001;
 static const insn32 armbx2_moveq_insn = 0x01a0f000;
 static const insn32 armbx3_bx_insn = 0xe12fff10;
 
 #ifndef ELFARM_NABI_C_INCLUDED
 static void
 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
 {
   asection * s;
   bfd_byte * contents;
 
   if (size == 0)
     {
       /* Do not include empty glue sections in the output.  */
       if (abfd != NULL)
         {
-          s = bfd_get_section_by_name (abfd, name);
+          s = bfd_get_linker_section (abfd, name);
           if (s != NULL)
             s->flags |= SEC_EXCLUDE;
         }
       return;
     }
 
   BFD_ASSERT (abfd != NULL);
 
-  s = bfd_get_section_by_name (abfd, name);
+  s = bfd_get_linker_section (abfd, name);
   BFD_ASSERT (s != NULL);
 
   contents = (bfd_byte *) bfd_alloc (abfd, size);
 
   BFD_ASSERT (s->size == size);
   s->contents = contents;
 }
 
 bfd_boolean
 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
@@ skipping 35 matching lines @@
   struct elf_link_hash_entry * myh;
   struct bfd_link_hash_entry * bh;
   struct elf32_arm_link_hash_table * globals;
   bfd_vma val;
   bfd_size_type size;
 
   globals = elf32_arm_hash_table (link_info);
   BFD_ASSERT (globals != NULL);
   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
 
-  s = bfd_get_section_by_name
+  s = bfd_get_linker_section
     (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
 
   BFD_ASSERT (s != NULL);
 
   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
                                   + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
 
   BFD_ASSERT (tmp_name);
 
   sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
@@ skipping 55 matching lines @@
     return;
 
   globals = elf32_arm_hash_table (link_info);
   BFD_ASSERT (globals != NULL);
   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
 
   /* Check if this veneer has already been allocated.  */
   if (globals->bx_glue_offset[reg])
     return;
 
-  s = bfd_get_section_by_name
+  s = bfd_get_linker_section
     (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
 
   BFD_ASSERT (s != NULL);
 
   /* Add symbol for veneer.  */
   tmp_name = (char *)
       bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
 
   BFD_ASSERT (tmp_name);
 
@@ skipping 70 matching lines @@
   struct elf_link_hash_entry *myh;
   struct bfd_link_hash_entry *bh;
   bfd_vma val;
   struct _arm_elf_section_data *sec_data;
   elf32_vfp11_erratum_list *newerr;
 
   hash_table = elf32_arm_hash_table (link_info);
   BFD_ASSERT (hash_table != NULL);
   BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
 
-  s = bfd_get_section_by_name
+  s = bfd_get_linker_section
     (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
 
   sec_data = elf32_arm_section_data (s);
 
   BFD_ASSERT (s != NULL);
 
   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
                                   (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
 
   BFD_ASSERT (tmp_name);
@@ skipping 86 matching lines @@
   (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
    | SEC_READONLY | SEC_LINKER_CREATED)
 
 /* Create a fake section for use by the ARM backend of the linker.  */
 
 static bfd_boolean
 arm_make_glue_section (bfd * abfd, const char * name)
 {
   asection * sec;
 
-  sec = bfd_get_section_by_name (abfd, name);
+  sec = bfd_get_linker_section (abfd, name);
   if (sec != NULL)
     /* Already made.  */
     return TRUE;
 
-  sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
+  sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
 
   if (sec == NULL
       || !bfd_set_section_alignment (abfd, sec, 2))
     return FALSE;
 
   /* Set the gc mark to prevent the section from being removed by garbage
      collection, despite the fact that no relocs refer to this section.  */
   sec->gc_mark = 1;
 
   return TRUE;
@@ skipping 44 matching lines @@
   globals->bfd_of_glue_owner = abfd;
 
   return TRUE;
 }
 
 static void
 check_use_blx (struct elf32_arm_link_hash_table *globals)
 {
   int cpu_arch;
 
-  cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 
+  cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
                                        Tag_CPU_arch);
 
   if (globals->fix_arm1176)
     {
       if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
         globals->use_blx = 1;
     }
   else
     {
       if (cpu_arch > TAG_CPU_ARCH_V4T)
@@ skipping 599 matching lines @@
   for (sec = abfd->sections; sec != NULL; sec = sec->next)
     {
       unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
       struct _arm_elf_section_data *sec_data;
 
       /* If we don't have executable progbits, we're not interested in this
          section.  Also skip if section is to be excluded.  */
       if (elf_section_type (sec) != SHT_PROGBITS
           || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
           || (sec->flags & SEC_EXCLUDE) != 0
-          || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
+          || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
           || sec->output_section == bfd_abs_section_ptr
           || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
         continue;
 
       sec_data = elf32_arm_section_data (sec);
 
       if (sec_data->mapcount == 0)
         continue;
 
       if (elf_section_data (sec)->this_hdr.contents != NULL)
@@ skipping 314 matching lines @@
   myh = find_thumb_glue (info, name, error_message);
   if (myh == NULL)
     return FALSE;
 
   globals = elf32_arm_hash_table (info);
   BFD_ASSERT (globals != NULL);
   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
 
   my_offset = myh->root.u.def.value;
 
-  s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
-                               THUMB2ARM_GLUE_SECTION_NAME);
+  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+                              THUMB2ARM_GLUE_SECTION_NAME);
 
   BFD_ASSERT (s != NULL);
   BFD_ASSERT (s->contents != NULL);
   BFD_ASSERT (s->output_section != NULL);
 
   if ((my_offset & 0x01) == 0x01)
     {
       if (sym_sec != NULL
           && sym_sec->owner != NULL
           && !INTERWORK_FLAG (sym_sec->owner))
@@ skipping 168 matching lines @@
   bfd_vma my_offset;
   asection * s;
   long int ret_offset;
   struct elf_link_hash_entry * myh;
   struct elf32_arm_link_hash_table * globals;
 
   globals = elf32_arm_hash_table (info);
   BFD_ASSERT (globals != NULL);
   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
 
-  s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
-                               ARM2THUMB_GLUE_SECTION_NAME);
+  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+                              ARM2THUMB_GLUE_SECTION_NAME);
   BFD_ASSERT (s != NULL);
   BFD_ASSERT (s->contents != NULL);
   BFD_ASSERT (s->output_section != NULL);
 
   myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
                                      sym_sec, val, s, error_message);
   if (!myh)
     return FALSE;
 
   my_offset = myh->root.u.def.value;
@@ skipping 32 matching lines @@
 
   eh = elf32_arm_hash_entry (h);
   /* Allocate stubs for exported Thumb functions on v4t.  */
   if (eh->export_glue == NULL)
     return TRUE;
 
   globals = elf32_arm_hash_table (info);
   BFD_ASSERT (globals != NULL);
   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
 
-  s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
-                               ARM2THUMB_GLUE_SECTION_NAME);
+  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+                              ARM2THUMB_GLUE_SECTION_NAME);
   BFD_ASSERT (s != NULL);
   BFD_ASSERT (s->contents != NULL);
   BFD_ASSERT (s->output_section != NULL);
 
   sec = eh->export_glue->root.u.def.section;
 
   BFD_ASSERT (sec->output_section != NULL);
 
   val = eh->export_glue->root.u.def.value + sec->output_offset
         + sec->output_section->vma;
@@ skipping 13 matching lines @@
 {
   bfd_byte *p;
   bfd_vma glue_addr;
   asection *s;
   struct elf32_arm_link_hash_table *globals;
 
   globals = elf32_arm_hash_table (info);
   BFD_ASSERT (globals != NULL);
   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
 
-  s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
-                               ARM_BX_GLUE_SECTION_NAME);
+  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
+                              ARM_BX_GLUE_SECTION_NAME);
   BFD_ASSERT (s != NULL);
   BFD_ASSERT (s->contents != NULL);
   BFD_ASSERT (s->output_section != NULL);
 
   BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
 
   glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
 
   if ((globals->bx_glue_offset[reg] & 1) == 0)
     {
@@ skipping 135 matching lines @@
 
   if (!htab->symbian_p)
     {
       /* We also need to make an entry in the .got.plt section, which
          will be placed in the .got section by the linker script.  */
       arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
       sgotplt->size += 4;
     }
 }
 
+static bfd_vma
+arm_movw_immediate (bfd_vma value)
+{
+  return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
+}
+
+static bfd_vma
+arm_movt_immediate (bfd_vma value)
+{
+  return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
+}
+
 /* Fill in a PLT entry and its associated GOT slot.  If DYNINDX == -1,
    the entry lives in .iplt and resolves to (*SYM_VALUE)().
    Otherwise, DYNINDX is the index of the symbol in the dynamic
    symbol table and SYM_VALUE is undefined.
 
    ROOT_PLT points to the offset of the PLT entry from the start of its
    section (.iplt or .plt).  ARM_PLT points to the symbol's ARM-specific
    bookkeeping information.  */
 
 static void
@@ skipping 140 matching lines @@
           SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
           loc += RELOC_SIZE (htab);
 
           /* Create the R_ARM_ABS32 relocation referencing the
              beginning of the PLT for this GOT entry.  */
           rel.r_offset = got_address;
           rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
           rel.r_addend = 0;
           SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
         }
+      else if (htab->nacl_p)
+        {
+          /* Calculate the displacement between the PLT slot and the
+             common tail that's part of the special initial PLT slot.  */
+          int32_t tail_displacement
+            = ((splt->output_section->vma + splt->output_offset
+                + ARM_NACL_PLT_TAIL_OFFSET)
+               - (plt_address + htab->plt_entry_size + 4));
+          BFD_ASSERT ((tail_displacement & 3) == 0);
+          tail_displacement >>= 2;
+
+          BFD_ASSERT ((tail_displacement & 0xff000000) == 0
+                      || (-tail_displacement & 0xff000000) == 0);
+
+          /* Calculate the displacement between the PLT slot and the entry
+             in the GOT.  The offset accounts for the value produced by
+             adding to pc in the penultimate instruction of the PLT stub.  */
+          got_displacement = (got_address
+                              - (plt_address + htab->plt_entry_size));
+
+          /* NaCl does not support interworking at all.  */
+          BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
+
+          put_arm_insn (htab, output_bfd,
+                        elf32_arm_nacl_plt_entry[0]
+                        | arm_movw_immediate (got_displacement),
+                        ptr + 0);
+          put_arm_insn (htab, output_bfd,
+                        elf32_arm_nacl_plt_entry[1]
+                        | arm_movt_immediate (got_displacement),
+                        ptr + 4);
+          put_arm_insn (htab, output_bfd,
+                        elf32_arm_nacl_plt_entry[2],
+                        ptr + 8);
+          put_arm_insn (htab, output_bfd,
+                        elf32_arm_nacl_plt_entry[3]
+                        | (tail_displacement & 0x00ffffff),
+                        ptr + 12);
+        }
       else
         {
           /* Calculate the displacement between the PLT slot and the
              entry in the GOT.  The eight-byte offset accounts for the
              value produced by adding to pc in the first instruction
              of the PLT stub.  */
           got_displacement = got_address - (plt_address + 8);
 
           BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
 
@@ skipping 120 matching lines @@
    R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
 
    Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
    is to then call final_link_relocate.  Return other values in the
    case of error.
 
    FIXME:When --emit-relocs is in effect, we'll emit relocs describing
    the pre-relaxed code.  It would be nice if the relocs were updated
    to match the optimization.   */
 
-static bfd_reloc_status_type 
+static bfd_reloc_status_type
 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
-                     bfd *input_bfd, asection *input_sec, bfd_byte *contents, 
+                     bfd *input_bfd, asection *input_sec, bfd_byte *contents,
                      Elf_Internal_Rela *rel, unsigned long is_local)
 {
   unsigned long insn;
-  
+
   switch (ELF32_R_TYPE (rel->r_info))
     {
     default:
       return bfd_reloc_notsupported;
-      
+
     case R_ARM_TLS_GOTDESC:
       if (is_local)
         insn = 0;
       else
         {
           insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
           if (insn & 1)
             insn -= 5; /* THUMB */
           else
             insn -= 8; /* ARM */
@@ skipping 35 matching lines @@
             /* It's a 32 bit instruction, fetch the rest of it for
                error generation.  */
             insn = (insn << 16)
               | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
           (*_bfd_error_handler)
             (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
              input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
           return bfd_reloc_notsupported;
         }
       break;
-      
+
     case R_ARM_TLS_DESCSEQ:
       /* arm insn.  */
       insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
       if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
         {
           if (is_local)
             /* mov rx, ry */
             bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
                         contents + rel->r_offset);
         }
@@ skipping 25 matching lines @@
           return bfd_reloc_notsupported;
         }
       break;
 
     case R_ARM_TLS_CALL:
       /* GD->IE relaxation, turn the instruction into 'nop' or
          'ldr r0, [pc,r0]'  */
       insn = is_local ? 0xe1a00000 : 0xe79f0000;
       bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
       break;
-      
+
     case R_ARM_THM_TLS_CALL:
       /* GD->IE relaxation */
       if (!is_local)
         /* add r0,pc; ldr r0, [r0]  */
         insn = 0x44786800;
       else if (arch_has_thumb2_nop (globals))
         /* nop.w */
         insn = 0xf3af8000;
       else
         /* nop; nop */
         insn = 0xbf00bf00;
-        
+
       bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
       bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
       break;
     }
   return bfd_reloc_ok;
 }
 
 /* For a given value of n, calculate the value of G_n as required to
    deal with group relocations.  We return it in the form of an
    encoded constant-and-rotation, together with the final residual.  If n is
@@ skipping 1400 matching lines @@
           }
         else
           {
             BFD_ASSERT (local_got_offsets != NULL);
             off = local_got_offsets[r_symndx];
             offplt = local_tlsdesc_gotents[r_symndx];
             tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
           }
 
         /* Linker relaxations happens from one of the
-           R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE.  */ 
+           R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE.  */
         if (ELF32_R_TYPE(rel->r_info) != r_type)
-          tls_type = GOT_TLS_IE; 
+          tls_type = GOT_TLS_IE;
 
         BFD_ASSERT (tls_type != GOT_UNKNOWN);
 
         if ((off & 1) != 0)
           off &= ~1;
         else
           {
             bfd_boolean need_relocs = FALSE;
             Elf_Internal_Rela outrel;
             int cur_off = off;
@@ skipping 20 matching lines @@
                 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
                             || info->shared);
                 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
                             <= globals->root.sgotplt->size);
 
                 outrel.r_addend = 0;
                 outrel.r_offset = (globals->root.sgotplt->output_section->vma
                                    + globals->root.sgotplt->output_offset
                                    + offplt
                                    + globals->sgotplt_jump_table_size);
-                
+
                 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
                 sreloc = globals->root.srelplt;
                 loc = sreloc->contents;
                 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
                 BFD_ASSERT (loc + RELOC_SIZE (globals)
                            <= sreloc->contents + sreloc->size);
 
                 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
 
                 /* For globals, the first word in the relocation gets
                    the relocation index and the top bit set, or zero,
                    if we're binding now.  For locals, it gets the
                    symbol's offset in the tls section.  */
                 bfd_put_32 (output_bfd,
                             !h ? value - elf_hash_table (info)->tls_sec->vma
                             : info->flags & DF_BIND_NOW ? 0
                             : 0x80000000 | ELF32_R_SYM (outrel.r_info),
-                            globals->root.sgotplt->contents + offplt +
-                            globals->sgotplt_jump_table_size);
-                
+                            globals->root.sgotplt->contents + offplt
+                            + globals->sgotplt_jump_table_size);
+
                 /* Second word in the relocation is always zero.  */
                 bfd_put_32 (output_bfd, 0,
-                            globals->root.sgotplt->contents + offplt +
-                            globals->sgotplt_jump_table_size + 4);
+                            globals->root.sgotplt->contents + offplt
+                            + globals->sgotplt_jump_table_size + 4);
               }
             if (tls_type & GOT_TLS_GD)
               {
                 if (need_relocs)
                   {
                     outrel.r_addend = 0;
                     outrel.r_offset = (sgot->output_section->vma
                                        + sgot->output_offset
                                        + cur_off);
                     outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
@@ skipping 99 matching lines @@
                           + stub_entry->stub_sec->output_section->vma);
               }
             else
               offset = (globals->root.splt->output_section->vma
                         + globals->root.splt->output_offset
                         + globals->tls_trampoline);
 
             if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
               {
                 unsigned long inst;
-                
-                offset -= (input_section->output_section->vma +
-                           input_section->output_offset + rel->r_offset + 8);
+
+                offset -= (input_section->output_section->vma
+                           + input_section->output_offset
+                           + rel->r_offset + 8);
 
                 inst = offset >> 2;
                 inst &= 0x00ffffff;
                 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
               }
             else
               {
                 /* Thumb blx encodes the offset in a complicated
                    fashion.  */
                 unsigned upper_insn, lower_insn;
                 unsigned neg;
 
-                offset -= (input_section->output_section->vma + 
-                           input_section->output_offset
+                offset -= (input_section->output_section->vma
+                           + input_section->output_offset
                            + rel->r_offset + 4);
-            
+
                 if (stub_type != arm_stub_none
                     && arm_stub_is_thumb (stub_type))
                   {
                     lower_insn = 0xd000;
                   }
                 else
                   {
                     lower_insn = 0xc000;
                     /* Round up the offset to a word boundary */
                     offset = (offset + 2) & ~2;
@@ skipping 12 matching lines @@
               }
           }
         /* These relocations needs special care, as besides the fact
            they point somewhere in .gotplt, the addend must be
            adjusted accordingly depending on the type of instruction
            we refer to */
         else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
           {
             unsigned long data, insn;
             unsigned thumb;
-            
+
             data = bfd_get_32 (input_bfd, hit_data);
             thumb = data & 1;
             data &= ~1u;
-            
+
             if (thumb)
               {
                 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
                 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
                   insn = (insn << 16)
                     | bfd_get_16 (input_bfd,
                                   contents + rel->r_offset - data + 2);
                 if ((insn & 0xf800c000) == 0xf000c000)
                   /* bl/blx */
                   value = -6;
@@ skipping 16 matching lines @@
                 switch (insn >> 24)
                   {
                   case 0xeb:  /* bl */
                   case 0xfa:  /* blx */
                     value = -4;
                     break;
 
                   case 0xe0:    /* add */
                     value = -8;
                     break;
-                    
+
                   default:
                     (*_bfd_error_handler)
                       (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
                        input_bfd, input_section,
                        (unsigned long)rel->r_offset, insn);
                     return bfd_reloc_notsupported;
                   }
               }
- 
+
             value += ((globals->root.sgotplt->output_section->vma
                        + globals->root.sgotplt->output_offset + off)
                       - (input_section->output_section->vma
                          + input_section->output_offset
                          + rel->r_offset)
                       + globals->sgotplt_jump_table_size);
           }
         else
           value = ((globals->root.sgot->output_section->vma
                     + globals->root.sgot->output_offset + off)
                    - (input_section->output_section->vma
                       + input_section->output_offset + rel->r_offset));
 
         return _bfd_final_link_relocate (howto, input_bfd, input_section,
                                          contents, rel->r_offset, value,
                                          rel->r_addend);
       }
 
     case R_ARM_TLS_LE32:
       if (info->shared && !info->pie)
         {
           (*_bfd_error_handler)
             (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
              input_bfd, input_section,
              (long) rel->r_offset, howto->name);
-          return (bfd_reloc_status_type) FALSE;
+          return bfd_reloc_notsupported;
         }
       else
         value = tpoff (info, value);
 
       return _bfd_final_link_relocate (howto, input_bfd, input_section,
                                        contents, rel->r_offset, value,
                                        rel->r_addend);
 
     case R_ARM_V4BX:
       if (globals->fix_v4bx)
@@ skipping 687 matching lines @@
               && bfd_is_und_section (sec)
               && ELF_ST_BIND (sym->st_info) != STB_WEAK)
             {
               if (!info->callbacks->undefined_symbol
                   (info, bfd_elf_string_from_elf_section
                    (input_bfd, symtab_hdr->sh_link, sym->st_name),
                    input_bfd, input_section,
                    rel->r_offset, TRUE))
                 return FALSE;
             }
-          
+
           if (globals->use_rel)
             {
               relocation = (sec->output_section->vma
                             + sec->output_offset
                             + sym->st_value);
               if (!info->relocatable
                   && (sec->flags & SEC_MERGE)
                   && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
                 {
                   asection *msec;
@@ skipping 88 matching lines @@
           bfd_boolean warned;
 
           RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
                                    r_symndx, symtab_hdr, sym_hashes,
                                    h, sec, relocation,
                                    unresolved_reloc, warned);
 
           sym_type = h->type;
         }
 
-      if (sec != NULL && elf_discarded_section (sec))
+      if (sec != NULL && discarded_section (sec))
         RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
-                                         rel, relend, howto, contents);
+                                         rel, 1, relend, howto, 0, contents);
 
       if (info->relocatable)
         {
           /* This is a relocatable link.  We don't have to change
              anything, unless the reloc is against a section symbol,
              in which case we have to adjust according to where the
              section symbol winds up in the output section.  */
           if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
             {
               if (globals->use_rel)
@@ skipping 33 matching lines @@
              name);
         }
 
       /* We call elf32_arm_final_link_relocate unless we're completely
          done, i.e., the relaxation produced the final output we want,
          and we won't let anybody mess with it. Also, we have to do
          addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
          both in relaxed and non-relaxed cases */
      if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
          || (IS_ARM_TLS_GNU_RELOC (r_type)
-             && !((h ? elf32_arm_hash_entry (h)->tls_type : 
+             && !((h ? elf32_arm_hash_entry (h)->tls_type :
                    elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
                   & GOT_TLS_GDESC)))
        {
          r = elf32_arm_tls_relax (globals, input_bfd, input_section,
                                   contents, rel, h == NULL);
          /* This may have been marked unresolved because it came from
             a shared library.  But we've just dealt with that.  */
          unresolved_reloc = 0;
        }
      else
        r = bfd_reloc_continue;
-     
+
      if (r == bfd_reloc_continue)
        r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
                                           input_section, contents, rel,
                                           relocation, info, sec, name, sym_type,
                                           (h ? h->target_internal
                                            : ARM_SYM_BRANCH_TYPE (sym)), h,
                                           &unresolved_reloc, &error_message);
 
       /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
          because such sections are not SEC_ALLOC and thus ld.so will
@@ skipping 75 matching lines @@
 
 static void
 add_unwind_table_edit (arm_unwind_table_edit **head,
                        arm_unwind_table_edit **tail,
                        arm_unwind_edit_type type,
                        asection *linked_section,
                        unsigned int tindex)
 {
   arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
       xmalloc (sizeof (arm_unwind_table_edit));
-  
+
   new_edit->type = type;
   new_edit->linked_section = linked_section;
   new_edit->index = tindex;
-  
+
   if (tindex > 0)
     {
       new_edit->next = NULL;
 
       if (*tail)
         (*tail)->next = new_edit;
 
       (*tail) = new_edit;
 
       if (!*head)
@@ skipping 37 matching lines @@
   add_unwind_table_edit (
     &exidx_arm_data->u.exidx.unwind_edit_list,
     &exidx_arm_data->u.exidx.unwind_edit_tail,
     INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
 
   adjust_exidx_size(exidx_sec, 8);
 }
 
 /* Scan .ARM.exidx tables, and create a list describing edits which should be
    made to those tables, such that:
-   
+
      1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
      2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
         codes which have been inlined into the index).
 
    If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
 
    The edits are applied when the tables are written
-   (in elf32_arm_write_section).
-*/
+   (in elf32_arm_write_section).  */
 
 bfd_boolean
 elf32_arm_fix_exidx_coverage (asection **text_section_order,
                               unsigned int num_text_sections,
                               struct bfd_link_info *info,
                               bfd_boolean merge_exidx_entries)
 {
   bfd *inp;
   unsigned int last_second_word = 0, i;
   asection *last_exidx_sec = NULL;
   asection *last_text_sec = NULL;
   int last_unwind_type = -1;
 
   /* Walk over all EXIDX sections, and create backlinks from the corrsponding
      text sections.  */
   for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
     {
       asection *sec;
-      
+
       for (sec = inp->sections; sec != NULL; sec = sec->next)
         {
           struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
           Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
-          
+
           if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
             continue;
-          
+
           if (elf_sec->linked_to)
             {
               Elf_Internal_Shdr *linked_hdr
                 = &elf_section_data (elf_sec->linked_to)->this_hdr;
               struct _arm_elf_section_data *linked_sec_arm_data
                 = get_arm_elf_section_data (linked_hdr->bfd_section);
 
               if (linked_sec_arm_data == NULL)
                 continue;
 
@@ skipping 41 matching lines @@
           continue;
         }
 
       /* Skip /DISCARD/ sections.  */
       if (bfd_is_abs_section (exidx_sec->output_section))
         continue;
 
       hdr = &elf_section_data (exidx_sec)->this_hdr;
       if (hdr->sh_type != SHT_ARM_EXIDX)
         continue;
-      
+
       exidx_arm_data = get_arm_elf_section_data (exidx_sec);
       if (exidx_arm_data == NULL)
         continue;
-      
+
       ibfd = exidx_sec->owner;
-          
+
       if (hdr->contents != NULL)
         contents = hdr->contents;
       else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
         /* An error?  */
         continue;
 
       for (j = 0; j < hdr->sh_size; j += 8)
         {
           unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
           int unwind_type;
@@ skipping 31 matching lines @@
           last_unwind_type = unwind_type;
         }
 
       /* Free contents if we allocated it ourselves.  */
       if (contents != hdr->contents)
         free (contents);
 
       /* Record edits to be applied later (in elf32_arm_write_section).  */
       exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
       exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
-          
+
       if (deleted_exidx_bytes > 0)
         adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
 
       last_exidx_sec = exidx_sec;
       last_text_sec = sec;
     }
 
   /* Add terminating CANTUNWIND entry.  */
   if (last_exidx_sec && last_unwind_type != 0)
     insert_cantunwind_after(last_text_sec, last_exidx_sec);
 
   return TRUE;
 }
 
 static bfd_boolean
 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
                                bfd *ibfd, const char *name)
 {
   asection *sec, *osec;
 
-  sec = bfd_get_section_by_name (ibfd, name);
+  sec = bfd_get_linker_section (ibfd, name);
   if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
     return TRUE;
 
   osec = sec->output_section;
   if (elf32_arm_write_section (obfd, info, sec, sec->contents))
     return TRUE;
 
   if (! bfd_set_section_contents (obfd, osec, sec->contents,
                                   sec->output_offset, sec->size))
     return FALSE;
@@ skipping 52 matching lines @@
 
       if (! elf32_arm_output_glue_section (info, abfd,
                                            globals->bfd_of_glue_owner,
                                            ARM_BX_GLUE_SECTION_NAME))
         return FALSE;
     }
 
   return TRUE;
 }
 
+/* Return a best guess for the machine number based on the attributes.  */
+
+static unsigned int
+bfd_arm_get_mach_from_attributes (bfd * abfd)
+{
+  int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
+
+  switch (arch)
+    {
+    case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
+    case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
+    case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
+
+    case TAG_CPU_ARCH_V5TE:
+      {
+        char * name;
+
+        BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
+        name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
+
+        if (name)
+          {
+            if (strcmp (name, "IWMMXT2") == 0)
+              return bfd_mach_arm_iWMMXt2;
+
+            if (strcmp (name, "IWMMXT") == 0)
+              return bfd_mach_arm_iWMMXt;
+          }
+
+        return bfd_mach_arm_5TE;
+      }
+
+    default:
+      return bfd_mach_arm_unknown;
+    }
+}
+
 /* Set the right machine number.  */
 
 static bfd_boolean
 elf32_arm_object_p (bfd *abfd)
 {
   unsigned int mach;
 
   mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
 
-  if (mach != bfd_mach_arm_unknown)
-    bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
+  if (mach == bfd_mach_arm_unknown)
+    {
+      if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
+        mach = bfd_mach_arm_ep9312;
+      else
+        mach = bfd_arm_get_mach_from_attributes (abfd);
+    }
 
-  else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
-    bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
-
-  else
-    bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
-
+  bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
   return TRUE;
 }
 
 /* Function to keep ARM specific flags in the ELF header.  */
 
 static bfd_boolean
 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
 {
   if (elf_flags_init (abfd)
       && elf_elfheader (abfd)->e_flags != flags)
@@ skipping 374 matching lines @@
     {
       _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
                           ibfd, oldtag, newtag);
       return -1;
     }
 
   return result;
 #undef T
 }
 
+/* Query attributes object to see if integer divide instructions may be
+   present in an object.  */
+static bfd_boolean
+elf32_arm_attributes_accept_div (const obj_attribute *attr)
+{
+  int arch = attr[Tag_CPU_arch].i;
+  int profile = attr[Tag_CPU_arch_profile].i;
+
+  switch (attr[Tag_DIV_use].i)
+    {
+    case 0:
+      /* Integer divide allowed if instruction contained in archetecture.  */
+      if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
+        return TRUE;
+      else if (arch >= TAG_CPU_ARCH_V7E_M)
+        return TRUE;
+      else
+        return FALSE;
+
+    case 1:
+      /* Integer divide explicitly prohibited.  */
+      return FALSE;
+
+    default:
+      /* Unrecognised case - treat as allowing divide everywhere.  */
+    case 2:
+      /* Integer divide allowed in ARM state.  */
+      return TRUE;
+    }
+}
+
+/* Query attributes object to see if integer divide instructions are
+   forbidden to be in the object.  This is not the inverse of
+   elf32_arm_attributes_accept_div.  */
+static bfd_boolean
+elf32_arm_attributes_forbid_div (const obj_attribute *attr)
+{
+  return attr[Tag_DIV_use].i == 1;
+}
+
 /* Merge EABI object attributes from IBFD into OBFD.  Raise an error if there
    are conflicting attributes.  */
 
 static bfd_boolean
 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
 {
   obj_attribute *in_attr;
   obj_attribute *out_attr;
   /* Some tags have 0 = don't care, 1 = strong requirement,
      2 = weak requirement.  */
@@ skipping 421 matching lines @@
                     (_("error: fp16 format mismatch between %B and %B"),
                      ibfd, obfd);
                   result = FALSE;
                 }
             }
           if (in_attr[i].i != 0)
             out_attr[i].i = in_attr[i].i;
           break;
 
         case Tag_DIV_use:
-          /* This tag is set to zero if we can use UDIV and SDIV in Thumb
-             mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
-             SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
-             CPU.  We will merge as follows: If the input attribute's value
-             is one then the output attribute's value remains unchanged.  If
-             the input attribute's value is zero or two then if the output
-             attribute's value is one the output value is set to the input
-             value, otherwise the output value must be the same as the
-             inputs.  */ 
-          if (in_attr[i].i != 1 && out_attr[i].i != 1) 
-            { 
-              if (in_attr[i].i != out_attr[i].i)
-                {
-                  _bfd_error_handler
-                    (_("DIV usage mismatch between %B and %B"),
-                     ibfd, obfd); 
-                  result = FALSE;
-                }
-            } 
-
-          if (in_attr[i].i != 1)
-            out_attr[i].i = in_attr[i].i; 
-          
+          /* A value of zero on input means that the divide instruction may
+             be used if available in the base architecture as specified via
+             Tag_CPU_arch and Tag_CPU_arch_profile.  A value of 1 means that
+             the user did not want divide instructions.  A value of 2
+             explicitly means that divide instructions were allowed in ARM
+             and Thumb state.  */
+          if (in_attr[i].i == out_attr[i].i)
+            /* Do nothing.  */ ;
+          else if (elf32_arm_attributes_forbid_div (in_attr)
+                   && !elf32_arm_attributes_accept_div (out_attr))
+            out_attr[i].i = 1;
+          else if (elf32_arm_attributes_forbid_div (out_attr)
+                   && elf32_arm_attributes_accept_div (in_attr))
+            out_attr[i].i = in_attr[i].i;
+          else if (in_attr[i].i == 2)
+            out_attr[i].i = in_attr[i].i;
           break;
 
         case Tag_MPextension_use_legacy:
           /* We don't output objects with Tag_MPextension_use_legacy - we
              move the value to Tag_MPextension_use.  */
           if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
             {
               if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
                 {
                   _bfd_error_handler
                     (_("%B has has both the current and legacy "
-                       "Tag_MPextension_use attributes"), 
+                       "Tag_MPextension_use attributes"),
                      ibfd);
                   result = FALSE;
                 }
             }
 
           if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
             out_attr[Tag_MPextension_use] = in_attr[i];
 
           break;
 
@@ skipping 359 matching lines @@
             may_need_local_target_p = TRUE;
           break;
 
         default:
           break;
         }
 
       if (may_need_local_target_p
           && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
         {
-          BFD_ASSERT (root_plt->refcount > 0);
-          root_plt->refcount -= 1;
+          /* If PLT refcount book-keeping is wrong and too low, we'll
+             see a zero value (going to -1) for the root PLT reference
+             count.  */
+          if (root_plt->refcount >= 0)
+            {
+              BFD_ASSERT (root_plt->refcount != 0);
+              root_plt->refcount -= 1;
+            }
+          else
+            /* A value of -1 means the symbol has become local, forced
+               or seeing a hidden definition.  Any other negative value
+               is an error.  */
+            BFD_ASSERT (root_plt->refcount == -1);
 
           if (!call_reloc_p)
             arm_plt->noncall_refcount--;
 
           if (r_type == R_ARM_THM_CALL)
             arm_plt->maybe_thumb_refcount--;
 
           if (r_type == R_ARM_THM_JUMP24
               || r_type == R_ARM_THM_JUMP19)
             arm_plt->thumb_refcount--;
@@ skipping 72 matching lines @@
   if (htab->root.dynobj == NULL)
     htab->root.dynobj = abfd;
   if (!create_ifunc_sections (info))
     return FALSE;
 
   dynobj = htab->root.dynobj;
 
   symtab_hdr = & elf_symtab_hdr (abfd);
   sym_hashes = elf_sym_hashes (abfd);
   nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
-  
+
   rel_end = relocs + sec->reloc_count;
   for (rel = relocs; rel < rel_end; rel++)
     {
       Elf_Internal_Sym *isym;
       struct elf_link_hash_entry *h;
       struct elf32_arm_link_hash_entry *eh;
       unsigned long r_symndx;
       int r_type;
 
       r_symndx = ELF32_R_SYM (rel->r_info);
@@ skipping 51 matching lines @@
           case R_ARM_THM_TLS_DESCSEQ:
           case R_ARM_TLS_CALL:
           case R_ARM_THM_TLS_CALL:
             /* This symbol requires a global offset table entry.  */
             {
               int tls_type, old_tls_type;
 
               switch (r_type)
                 {
                 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
-                  
+
                 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
-                  
+
                 case R_ARM_TLS_GOTDESC:
                 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
                 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
                   tls_type = GOT_TLS_GDESC; break;
-                  
+
                 default: tls_type = GOT_NORMAL; break;
                 }
 
               if (h != NULL)
                 {
                   h->got.refcount++;
                   old_tls_type = elf32_arm_hash_entry (h)->tls_type;
                 }
               else
                 {
@@ skipping 168 matching lines @@
             {
               local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
               if (local_iplt == NULL)
                 return FALSE;
               root_plt = &local_iplt->root;
               arm_plt = &local_iplt->arm;
             }
 
           /* If the symbol is a function that doesn't bind locally,
              this relocation will need a PLT entry.  */
-          root_plt->refcount += 1;
+          if (root_plt->refcount != -1)
+            root_plt->refcount += 1;
 
           if (!call_reloc_p)
             arm_plt->noncall_refcount++;
 
           /* It's too early to use htab->use_blx here, so we have to
              record possible blx references separately from
              relocs that definitely need a thumb stub.  */
 
           if (r_type == R_ARM_THM_CALL)
             arm_plt->maybe_thumb_refcount += 1;
@@ skipping 340 matching lines @@
 
   /* If we are creating a shared library, we must presume that the
      only references to the symbol are via the global offset table.
      For such cases we need not do anything here; the relocations will
      be handled correctly by relocate_section.  Relocatable executables
      can reference data in shared objects directly, so we don't need to
      do anything here.  */
   if (info->shared || globals->root.is_relocatable_executable)
     return TRUE;
 
-  if (h->size == 0)
-    {
-      (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
-                             h->root.root.string);
-      return TRUE;
-    }
-
   /* We must allocate the symbol in our .dynbss section, which will
      become part of the .bss section of the executable.  There will be
      an entry for this symbol in the .dynsym section.  The dynamic
      object will contain position independent code, so all references
      from the dynamic object to this symbol will go through the global
      offset table.  The dynamic linker will use the .dynsym entry to
      determine the address it must put in the global offset table, so
      both the dynamic object and the regular object will refer to the
      same memory location for the variable.  */
-  s = bfd_get_section_by_name (dynobj, ".dynbss");
+  s = bfd_get_linker_section (dynobj, ".dynbss");
   BFD_ASSERT (s != NULL);
 
   /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
      copy the initial value out of the dynamic object and into the
      runtime process image.  We need to remember the offset into the
      .rel(a).bss section we are going to use.  */
-  if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+  if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
     {
       asection *srel;
 
-      srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
+      srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
       elf32_arm_allocate_dynrelocs (info, srel, 1);
       h->needs_copy = 1;
     }
 
   return _bfd_elf_adjust_dynamic_copy (h, s);
 }
 
 /* Allocate space in .plt, .got and associated reloc sections for
    dynamic relocs.  */
 
@@ skipping 169 matching lines @@
               && (info->shared || indx != 0)
               && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
                   || h->root.type != bfd_link_hash_undefweak))
             {
               if (tls_type & GOT_TLS_IE)
                 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
 
               if (tls_type & GOT_TLS_GD)
                 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
 
-              if (tls_type & GOT_TLS_GDESC) 
+              if (tls_type & GOT_TLS_GDESC)
                 {
                   elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
                   /* GDESC needs a trampoline to jump to.  */
                   htab->tls_trampoline = -1;
                 }
 
               /* Only GD needs it.  GDESC just emits one relocation per
                  2 entries.  */
-              if ((tls_type & GOT_TLS_GD) && indx != 0)  
+              if ((tls_type & GOT_TLS_GD) && indx != 0)
                 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
             }
           else if (!SYMBOL_REFERENCES_LOCAL (info, h))
             {
               if (htab->root.dynamic_sections_created)
                 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation.  */
                 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
             }
           else if (h->type == STT_GNU_IFUNC
                    && eh->plt.noncall_refcount == 0)
@@ skipping 222 matching lines @@
 
   dynobj = elf_hash_table (info)->dynobj;
   BFD_ASSERT (dynobj != NULL);
   check_use_blx (htab);
 
   if (elf_hash_table (info)->dynamic_sections_created)
     {
       /* Set the contents of the .interp section to the interpreter.  */
       if (info->executable)
         {
-          s = bfd_get_section_by_name (dynobj, ".interp");
+          s = bfd_get_linker_section (dynobj, ".interp");
           BFD_ASSERT (s != NULL);
           s->size = sizeof ELF_DYNAMIC_INTERPRETER;
           s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
         }
     }
 
   /* Set up .got offsets for local syms, and space for local dynamic
      relocs.  */
   for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
     {
@@ skipping 191 matching lines @@
      it's not incremented, so in order to compute the space reserved
      for them, it suffices to multiply the reloc count by the jump
      slot size.  */
   if (htab->root.srelplt)
     htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
 
   if (htab->tls_trampoline)
     {
       if (htab->root.splt->size == 0)
         htab->root.splt->size += htab->plt_header_size;
-      
+
       htab->tls_trampoline = htab->root.splt->size;
       htab->root.splt->size += htab->plt_entry_size;
-      
+
       /* If we're not using lazy TLS relocations, don't generate the
          PLT and GOT entries they require.  */
       if (!(info->flags & DF_BIND_NOW))
         {
           htab->dt_tlsdesc_got = htab->root.sgot->size;
           htab->root.sgot->size += 4;
 
           htab->dt_tlsdesc_plt = htab->root.splt->size;
           htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
         }
@@ skipping 87 matching lines @@
       if (plt)
         {
           if (   !add_dynamic_entry (DT_PLTGOT, 0)
               || !add_dynamic_entry (DT_PLTRELSZ, 0)
               || !add_dynamic_entry (DT_PLTREL,
                                      htab->use_rel ? DT_REL : DT_RELA)
               || !add_dynamic_entry (DT_JMPREL, 0))
             return FALSE;
 
           if (htab->dt_tlsdesc_plt &&
-                (!add_dynamic_entry (DT_TLSDESC_PLT,0) 
+                (!add_dynamic_entry (DT_TLSDESC_PLT,0)
                  || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
-            return FALSE; 
+            return FALSE;
         }
 
       if (relocs)
         {
           if (htab->use_rel)
             {
               if (!add_dynamic_entry (DT_REL, 0)
                   || !add_dynamic_entry (DT_RELSZ, 0)
                   || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
                 return FALSE;
@@ skipping 52 matching lines @@
         {
           struct bfd_link_hash_entry *bh = NULL;
           const struct elf_backend_data *bed
             = get_elf_backend_data (output_bfd);
 
           if (!(_bfd_generic_link_add_one_symbol
                 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
                  tls_sec, 0, NULL, FALSE,
                  bed->collect, &bh)))
             return FALSE;
-          
+
           tlsbase->type = STT_TLS;
           tlsbase = (struct elf_link_hash_entry *)bh;
           tlsbase->def_regular = 1;
           tlsbase->other = STV_HIDDEN;
           (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
         }
     }
   return TRUE;
 }
 
@@ skipping 80 matching lines @@
 
   return TRUE;
 }
 
 static void
 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
                     void *contents,
                     const unsigned long *template, unsigned count)
 {
   unsigned ix;
-  
+
   for (ix = 0; ix != count; ix++)
     {
       unsigned long insn = template[ix];
 
       /* Emit mov pc,rx if bx is not permitted.  */
       if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
         insn = (insn & 0xf000000f) | 0x01a0f000;
       put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
     }
 }
@@ skipping 12 matching lines @@
   if (htab == NULL)
     return FALSE;
 
   dynobj = elf_hash_table (info)->dynobj;
 
   sgot = htab->root.sgotplt;
   /* A broken linker script might have discarded the dynamic sections.
      Catch this here so that we do not seg-fault later on.  */
   if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
     return FALSE;
-  sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
+  sdyn = bfd_get_linker_section (dynobj, ".dynamic");
 
   if (elf_hash_table (info)->dynamic_sections_created)
     {
       asection *splt;
       Elf32_External_Dyn *dyncon, *dynconend;
 
       splt = htab->root.splt;
       BFD_ASSERT (splt != NULL && sdyn != NULL);
       BFD_ASSERT (htab->symbian_p || sgot != NULL);
 
@@ skipping 188 matching lines @@
                             splt->contents + 8);
               bfd_put_32 (output_bfd, got_address, splt->contents + 12);
 
               /* Generate a relocation for _GLOBAL_OFFSET_TABLE_.  */
               rel.r_offset = plt_address + 12;
               rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
               rel.r_addend = 0;
               SWAP_RELOC_OUT (htab) (output_bfd, &rel,
                                      htab->srelplt2->contents);
             }
+          else if (htab->nacl_p)
+            {
+              unsigned int i;
+
+              got_displacement = got_address + 8 - (plt_address + 16);
+
+              put_arm_insn (htab, output_bfd,
+                            elf32_arm_nacl_plt0_entry[0]
+                            | arm_movw_immediate (got_displacement),
+                            splt->contents + 0);
+              put_arm_insn (htab, output_bfd,
+                            elf32_arm_nacl_plt0_entry[1]
+                            | arm_movt_immediate (got_displacement),
+                            splt->contents + 4);
+              for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
+                put_arm_insn (htab, output_bfd,
+                              elf32_arm_nacl_plt0_entry[i],
+                              splt->contents + (i * 4));
+            }
           else
             {
               got_displacement = got_address - (plt_address + 16);
 
               plt0_entry = elf32_arm_plt0_entry;
               put_arm_insn (htab, output_bfd, plt0_entry[0],
                             splt->contents + 0);
               put_arm_insn (htab, output_bfd, plt0_entry[1],
                             splt->contents + 4);
               put_arm_insn (htab, output_bfd, plt0_entry[2],
@@ skipping 18 matching lines @@
 
       if (htab->dt_tlsdesc_plt)
         {
           bfd_vma got_address
             = sgot->output_section->vma + sgot->output_offset;
           bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
                                     + htab->root.sgot->output_offset);
           bfd_vma plt_address
             = splt->output_section->vma + splt->output_offset;
 
-          arm_put_trampoline (htab, output_bfd, 
+          arm_put_trampoline (htab, output_bfd,
                               splt->contents + htab->dt_tlsdesc_plt,
                               dl_tlsdesc_lazy_trampoline, 6);
 
           bfd_put_32 (output_bfd,
                       gotplt_address + htab->dt_tlsdesc_got
                       - (plt_address + htab->dt_tlsdesc_plt)
                       - dl_tlsdesc_lazy_trampoline[6],
                       splt->contents + htab->dt_tlsdesc_plt + 24);
           bfd_put_32 (output_bfd,
                       got_address - (plt_address + htab->dt_tlsdesc_plt)
                       - dl_tlsdesc_lazy_trampoline[7],
                       splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
         }
 
       if (htab->tls_trampoline)
         {
-          arm_put_trampoline (htab, output_bfd, 
+          arm_put_trampoline (htab, output_bfd,
                               splt->contents + htab->tls_trampoline,
                               tls_trampoline, 3);
 #ifdef FOUR_WORD_PLT
           bfd_put_32 (output_bfd, 0x00000000,
                       splt->contents + htab->tls_trampoline + 12);
-#endif 
+#endif
         }
 
       if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
         {
           /* Correct the .rel(a).plt.unloaded relocations.  They will have
              incorrect symbol indexes.  */
           int num_plts;
           unsigned char *p;
 
           num_plts = ((htab->root.splt->size - htab->plt_header_size)
@@ skipping 146 matching lines @@
 get_arm_elf_section_data (asection * sec)
 {
   if (sec && sec->owner && is_arm_elf (sec->owner))
     return elf32_arm_section_data (sec);
   else
     return NULL;
 }
 
 typedef struct
 {
-  void *finfo;
+  void *flaginfo;
   struct bfd_link_info *info;
   asection *sec;
   int sec_shndx;
   int (*func) (void *, const char *, Elf_Internal_Sym *,
                asection *, struct elf_link_hash_entry *);
 } output_arch_syminfo;
 
 enum map_symbol_type
 {
   ARM_MAP_ARM,
@@ skipping 14 matching lines @@
 
   sym.st_value = osi->sec->output_section->vma
                  + osi->sec->output_offset
                  + offset;
   sym.st_size = 0;
   sym.st_other = 0;
   sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
   sym.st_shndx = osi->sec_shndx;
   sym.st_target_internal = 0;
   elf32_arm_section_map_add (osi->sec, names[type][1], offset);
-  return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
+  return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
 }
 
 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
    IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt.  */
 
 static bfd_boolean
 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
                             bfd_boolean is_iplt_entry_p,
                             union gotplt_union *root_plt,
                             struct arm_plt_info *arm_plt)
@@ skipping 33 matching lines @@
     {
       if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
         return FALSE;
       if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
         return FALSE;
       if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
         return FALSE;
       if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
         return FALSE;
     }
+  else if (htab->nacl_p)
+    {
+      if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
+        return FALSE;
+    }
   else
     {
       bfd_boolean thumb_stub_p;
 
       thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
       if (thumb_stub_p)
         {
           if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
             return FALSE;
         }
@@ skipping 48 matching lines @@
   Elf_Internal_Sym sym;
 
   sym.st_value = osi->sec->output_section->vma
                  + osi->sec->output_offset
                  + offset;
   sym.st_size = size;
   sym.st_other = 0;
   sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   sym.st_shndx = osi->sec_shndx;
   sym.st_target_internal = 0;
-  return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
+  return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
 }
 
 static bfd_boolean
 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
                   void * in_arg)
 {
   struct elf32_arm_stub_hash_entry *stub_entry;
   asection *stub_sec;
   bfd_vma addr;
   char *stub_name;
@@ skipping 91 matching lines @@
   return TRUE;
 }
 
 /* Output mapping symbols for linker generated sections,
    and for those data-only sections that do not have a
    $d.  */
 
 static bfd_boolean
 elf32_arm_output_arch_local_syms (bfd *output_bfd,
                                   struct bfd_link_info *info,
-                                  void *finfo,
+                                  void *flaginfo,
                                   int (*func) (void *, const char *,
                                                Elf_Internal_Sym *,
                                                asection *,
                                                struct elf_link_hash_entry *))
 {
   output_arch_syminfo osi;
   struct elf32_arm_link_hash_table *htab;
   bfd_vma offset;
   bfd_size_type size;
   bfd *input_bfd;
 
   htab = elf32_arm_hash_table (info);
   if (htab == NULL)
     return FALSE;
 
   check_use_blx (htab);
 
-  osi.finfo = finfo;
+  osi.flaginfo = flaginfo;
   osi.info = info;
   osi.func = func;
 
   /* Add a $d mapping symbol to data-only sections that
      don't have any mapping symbol.  This may result in (harmless) redundant
      mapping symbols.  */
   for (input_bfd = info->input_bfds;
        input_bfd != NULL;
        input_bfd = input_bfd->link_next)
     {
@@ skipping 16 matching lines @@
                   (output_bfd, osi.sec->output_section);
                 if (osi.sec_shndx != (int)SHN_BAD)
                   elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
               }
           }
     }
 
   /* ARM->Thumb glue.  */
   if (htab->arm_glue_size > 0)
     {
-      osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
-                                         ARM2THUMB_GLUE_SECTION_NAME);
+      osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
+                                        ARM2THUMB_GLUE_SECTION_NAME);
 
       osi.sec_shndx = _bfd_elf_section_from_bfd_section
           (output_bfd, osi.sec->output_section);
       if (info->shared || htab->root.is_relocatable_executable
           || htab->pic_veneer)
         size = ARM2THUMB_PIC_GLUE_SIZE;
       else if (htab->use_blx)
         size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
       else
         size = ARM2THUMB_STATIC_GLUE_SIZE;
 
       for (offset = 0; offset < htab->arm_glue_size; offset += size)
         {
           elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
           elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
         }
     }
 
   /* Thumb->ARM glue.  */
   if (htab->thumb_glue_size > 0)
     {
-      osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
-                                         THUMB2ARM_GLUE_SECTION_NAME);
+      osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
+                                        THUMB2ARM_GLUE_SECTION_NAME);
 
       osi.sec_shndx = _bfd_elf_section_from_bfd_section
           (output_bfd, osi.sec->output_section);
       size = THUMB2ARM_GLUE_SIZE;
 
       for (offset = 0; offset < htab->thumb_glue_size; offset += size)
         {
           elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
           elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
         }
     }
 
   /* ARMv4 BX veneers.  */
   if (htab->bx_glue_size > 0)
     {
-      osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
-                                         ARM_BX_GLUE_SECTION_NAME);
+      osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
+                                        ARM_BX_GLUE_SECTION_NAME);
 
       osi.sec_shndx = _bfd_elf_section_from_bfd_section
           (output_bfd, osi.sec->output_section);
 
       elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
     }
 
   /* Long calls stubs.  */
   if (htab->stub_bfd && htab->stub_bfd->sections)
     {
@@ skipping 29 matching lines @@
         {
           /* VxWorks shared libraries have no PLT header.  */
           if (!info->shared)
             {
               if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
                 return FALSE;
               if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
                 return FALSE;
             }
         }
+      else if (htab->nacl_p)
+        {
+          if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
+            return FALSE;
+        }
       else if (!htab->symbian_p)
         {
           if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
             return FALSE;
 #ifndef FOUR_WORD_PLT
           if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
             return FALSE;
 #endif
         }
     }
@@ skipping 19 matching lines @@
                                                     &local_iplt[i]->arm))
                   return FALSE;
             }
         }
     }
   if (htab->dt_tlsdesc_plt != 0)
     {
       /* Mapping symbols for the lazy tls trampoline.  */
       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
         return FALSE;
-       
+
       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
                                      htab->dt_tlsdesc_plt + 24))
         return FALSE;
     }
   if (htab->tls_trampoline != 0)
     {
       /* Mapping symbols for the tls trampoline.  */
       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
         return FALSE;
 #ifdef FOUR_WORD_PLT
       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
                                      htab->tls_trampoline + 12))
         return FALSE;
-#endif 
+#endif
     }
-  
+
   return TRUE;
 }
 
 /* Allocate target specific section data.  */
 
 static bfd_boolean
 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
 {
   if (!sec->used_by_bfd)
     {
@@ skipping 42 matching lines @@
 }
 
 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
    relocations.  */
 
 static void
 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
 {
   unsigned long first_word = bfd_get_32 (output_bfd, from);
   unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
-  
+
   /* High bit of first word is supposed to be zero.  */
   if ((first_word & 0x80000000ul) == 0)
     first_word = offset_prel31 (first_word, offset);
-  
+
   /* If the high bit of the first word is clear, and the bit pattern is not 0x1
      (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry.  */
   if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
     second_word = offset_prel31 (second_word, offset);
-  
+
   bfd_put_32 (output_bfd, first_word, to);
   bfd_put_32 (output_bfd, second_word, to + 4);
 }
 
 /* Data for make_branch_to_a8_stub().  */
 
-struct a8_branch_to_stub_data {
+struct a8_branch_to_stub_data
+{
   asection *writing_section;
   bfd_byte *contents;
 };
 
 
 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
    places for a particular section.  */
 
 static bfd_boolean
 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
@@ skipping 217 matching lines @@
       bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
       unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
       unsigned int in_index, out_index;
       bfd_vma add_to_offsets = 0;
 
       for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
         {
           if (edit_node)
             {
               unsigned int edit_index = edit_node->index;
-              
+
               if (in_index < edit_index && in_index * 8 < input_size)
                 {
                   copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
                                     contents + in_index * 8, add_to_offsets);
                   out_index++;
                   in_index++;
                 }
               else if (in_index == edit_index
                        || (in_index * 8 >= input_size
                            && edit_index == UINT_MAX))
                 {
                   switch (edit_node->type)
                     {
                     case DELETE_EXIDX_ENTRY:
                       in_index++;
                       add_to_offsets += 8;
                       break;
-                    
+
                     case INSERT_EXIDX_CANTUNWIND_AT_END:
                       {
                         asection *text_sec = edit_node->linked_section;
                         bfd_vma text_offset = text_sec->output_section->vma
                                               + text_sec->output_offset
                                               + text_sec->size;
                         bfd_vma exidx_offset = offset + out_index * 8;
                         unsigned long prel31_offset;
 
                         /* Note: this is meant to be equivalent to an
                            R_ARM_PREL31 relocation.  These synthetic
                            EXIDX_CANTUNWIND markers are not relocated by the
                            usual BFD method.  */
                         prel31_offset = (text_offset - exidx_offset)
                                         & 0x7ffffffful;
 
                         /* First address we can't unwind.  */
                         bfd_put_32 (output_bfd, prel31_offset,
                                     &edited_contents[out_index * 8]);
 
                         /* Code for EXIDX_CANTUNWIND.  */
                         bfd_put_32 (output_bfd, 0x1,
                                     &edited_contents[out_index * 8 + 4]);
 
                         out_index++;
                         add_to_offsets -= 8;
                       }
                       break;
                     }
-                  
+
                   edit_node = edit_node->next;
                 }
             }
           else
             {
               /* No more edits, copy remaining entries verbatim.  */
               copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
                                 contents + in_index * 8, add_to_offsets);
               out_index++;
               in_index++;
@@ skipping 269 matching lines @@
 
 #define bfd_elf32_mkobject                      elf32_arm_mkobject
 
 #define bfd_elf32_bfd_copy_private_bfd_data     elf32_arm_copy_private_bfd_data
 #define bfd_elf32_bfd_merge_private_bfd_data    elf32_arm_merge_private_bfd_data
 #define bfd_elf32_bfd_set_private_flags         elf32_arm_set_private_flags
 #define bfd_elf32_bfd_print_private_bfd_data    elf32_arm_print_private_bfd_data
 #define bfd_elf32_bfd_link_hash_table_create    elf32_arm_link_hash_table_create
 #define bfd_elf32_bfd_link_hash_table_free      elf32_arm_hash_table_free
 #define bfd_elf32_bfd_reloc_type_lookup         elf32_arm_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
+#define bfd_elf32_bfd_reloc_name_lookup         elf32_arm_reloc_name_lookup
 #define bfd_elf32_find_nearest_line             elf32_arm_find_nearest_line
 #define bfd_elf32_find_inliner_info             elf32_arm_find_inliner_info
 #define bfd_elf32_new_section_hook              elf32_arm_new_section_hook
 #define bfd_elf32_bfd_is_target_special_symbol  elf32_arm_is_target_special_symbol
 #define bfd_elf32_bfd_final_link                elf32_arm_final_link
 
 #define elf_backend_get_symbol_type             elf32_arm_get_symbol_type
 #define elf_backend_gc_mark_hook                elf32_arm_gc_mark_hook
 #define elf_backend_gc_mark_extra_sections      elf32_arm_gc_mark_extra_sections
 #define elf_backend_gc_sweep_hook               elf32_arm_gc_sweep_hook
@@ skipping 33 matching lines @@
 #define elf_backend_got_header_size     12
 
 #undef  elf_backend_obj_attrs_vendor
 #define elf_backend_obj_attrs_vendor            "aeabi"
 #undef  elf_backend_obj_attrs_section
 #define elf_backend_obj_attrs_section           ".ARM.attributes"
 #undef  elf_backend_obj_attrs_arg_type
 #define elf_backend_obj_attrs_arg_type          elf32_arm_obj_attrs_arg_type
 #undef  elf_backend_obj_attrs_section_type
 #define elf_backend_obj_attrs_section_type      SHT_ARM_ATTRIBUTES
-#define elf_backend_obj_attrs_order     elf32_arm_obj_attrs_order
-#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
+#define elf_backend_obj_attrs_order             elf32_arm_obj_attrs_order
+#define elf_backend_obj_attrs_handle_unknown    elf32_arm_obj_attrs_handle_unknown
 
 #include "elf32-target.h"
 
+/* Native Client targets.  */
+
+#undef  TARGET_LITTLE_SYM
+#define TARGET_LITTLE_SYM               bfd_elf32_littlearm_nacl_vec
+#undef  TARGET_LITTLE_NAME
+#define TARGET_LITTLE_NAME              "elf32-littlearm-nacl"
+#undef  TARGET_BIG_SYM
+#define TARGET_BIG_SYM                  bfd_elf32_bigarm_nacl_vec
+#undef  TARGET_BIG_NAME
+#define TARGET_BIG_NAME                 "elf32-bigarm-nacl"
+
+/* Like elf32_arm_link_hash_table_create -- but overrides
+   appropriately for NaCl.  */
+
+static struct bfd_link_hash_table *
+elf32_arm_nacl_link_hash_table_create (bfd *abfd)
+{
+  struct bfd_link_hash_table *ret;
+
+  ret = elf32_arm_link_hash_table_create (abfd);
+  if (ret)
+    {
+      struct elf32_arm_link_hash_table *htab
+        = (struct elf32_arm_link_hash_table *) ret;
+
+      htab->nacl_p = 1;
+
+      htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
+      htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
+    }
+  return ret;
+}
+
+/* Since NaCl doesn't use the ARM-specific unwind format, we don't
+   really need to use elf32_arm_modify_segment_map.  But we do it
+   anyway just to reduce gratuitous differences with the stock ARM backend.  */
+
+static bfd_boolean
+elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
+{
+  return (elf32_arm_modify_segment_map (abfd, info)
+          && nacl_modify_segment_map (abfd, info));
+}
+
+#undef  elf32_bed
+#define elf32_bed                       elf32_arm_nacl_bed
+#undef  bfd_elf32_bfd_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_create    \
+  elf32_arm_nacl_link_hash_table_create
+#undef  elf_backend_plt_alignment
+#define elf_backend_plt_alignment       4
+#undef  elf_backend_modify_segment_map
+#define elf_backend_modify_segment_map          elf32_arm_nacl_modify_segment_map
+#undef  elf_backend_modify_program_headers
+#define elf_backend_modify_program_headers      nacl_modify_program_headers
+
+#undef  ELF_MAXPAGESIZE
+#define ELF_MAXPAGESIZE                 0x10000
+
+#include "elf32-target.h"
+
+/* Reset to defaults.  */
+#undef  elf_backend_plt_alignment
+#undef  elf_backend_modify_segment_map
+#define elf_backend_modify_segment_map          elf32_arm_modify_segment_map
+#undef  elf_backend_modify_program_headers
+
 /* VxWorks Targets.  */
 
 #undef  TARGET_LITTLE_SYM
 #define TARGET_LITTLE_SYM               bfd_elf32_littlearm_vxworks_vec
 #undef  TARGET_LITTLE_NAME
 #define TARGET_LITTLE_NAME              "elf32-littlearm-vxworks"
 #undef  TARGET_BIG_SYM
 #define TARGET_BIG_SYM                  bfd_elf32_bigarm_vxworks_vec
 #undef  TARGET_BIG_NAME
 #define TARGET_BIG_NAME                 "elf32-bigarm-vxworks"
@@ skipping 426 matching lines @@
 #undef  elf_backend_may_use_rela_p
 #define elf_backend_may_use_rela_p      0
 #undef  elf_backend_default_use_rela_p
 #define elf_backend_default_use_rela_p  0
 #undef  elf_backend_want_plt_sym
 #define elf_backend_want_plt_sym        0
 #undef  ELF_MAXPAGESIZE
 #define ELF_MAXPAGESIZE                 0x8000
 
 #include "elf32-target.h"