Merge GDB 7.5.1

bfd/doc/archures.texi

 @section Architectures
 BFD keeps one atom in a BFD describing the
 architecture of the data attached to the BFD: a pointer to a
 @code{bfd_arch_info_type}.
 
 Pointers to structures can be requested independently of a BFD
 so that an architecture's information can be interrogated
 without access to an open BFD.
 
 The architecture information is provided by each architecture package.
@@ skipping 188 matching lines @@
 #define bfd_mach_ppc_630       630
 #define bfd_mach_ppc_750       750
 #define bfd_mach_ppc_860       860
 #define bfd_mach_ppc_a35       35
 #define bfd_mach_ppc_rs64ii    642
 #define bfd_mach_ppc_rs64iii   643
 #define bfd_mach_ppc_7400      7400
 #define bfd_mach_ppc_e500      500
 #define bfd_mach_ppc_e500mc    5001
 #define bfd_mach_ppc_e500mc64  5005
+#define bfd_mach_ppc_e5500     5006
+#define bfd_mach_ppc_e6500     5007
 #define bfd_mach_ppc_titan     83
+#define bfd_mach_ppc_vle       84
   bfd_arch_rs6000,    /* IBM RS/6000 */
 #define bfd_mach_rs6k          6000
 #define bfd_mach_rs6k_rs1      6001
 #define bfd_mach_rs6k_rsc      6003
 #define bfd_mach_rs6k_rs2      6002
   bfd_arch_hppa,      /* HP PA RISC */
 #define bfd_mach_hppa10        10
 #define bfd_mach_hppa11        11
 #define bfd_mach_hppa20        20
 #define bfd_mach_hppa20w       25
   bfd_arch_d10v,      /* Mitsubishi D10V */
 #define bfd_mach_d10v          1
 #define bfd_mach_d10v_ts2      2
 #define bfd_mach_d10v_ts3      3
   bfd_arch_d30v,      /* Mitsubishi D30V */
   bfd_arch_dlx,       /* DLX */
   bfd_arch_m68hc11,   /* Motorola 68HC11 */
   bfd_arch_m68hc12,   /* Motorola 68HC12 */
 #define bfd_mach_m6812_default 0
 #define bfd_mach_m6812         1
 #define bfd_mach_m6812s        2
+  bfd_arch_m9s12x,   /* Freescale S12X */
+  bfd_arch_m9s12xg,  /* Freescale XGATE */
   bfd_arch_z8k,       /* Zilog Z8000 */
 #define bfd_mach_z8001         1
 #define bfd_mach_z8002         2
   bfd_arch_h8500,     /* Renesas H8/500 (formerly Hitachi H8/500) */
   bfd_arch_sh,        /* Renesas / SuperH SH (formerly Hitachi SH) */
 #define bfd_mach_sh            1
 #define bfd_mach_sh2        0x20
 #define bfd_mach_sh_dsp     0x2d
 #define bfd_mach_sh2a       0x2a
 #define bfd_mach_sh2a_nofpu 0x2b
@@ skipping 155 matching lines @@
 #define bfd_mach_msp31          31
 #define bfd_mach_msp32          32
 #define bfd_mach_msp33          33
 #define bfd_mach_msp41          41
 #define bfd_mach_msp42          42
 #define bfd_mach_msp43          43
 #define bfd_mach_msp44          44
   bfd_arch_xc16x,     /* Infineon's XC16X Series.               */
 #define bfd_mach_xc16x         1
 #define bfd_mach_xc16xl        2
-#define bfd_mach_xc16xs         3
+#define bfd_mach_xc16xs        3
+  bfd_arch_xgate,   /* Freescale XGATE */
+#define bfd_mach_xgate         1
   bfd_arch_xtensa,    /* Tensilica's Xtensa cores.  */
 #define bfd_mach_xtensa        1
   bfd_arch_z80,
 #define bfd_mach_z80strict      1 /* No undocumented opcodes.  */
 #define bfd_mach_z80            3 /* With ixl, ixh, iyl, and iyh.  */
 #define bfd_mach_z80full        7 /* All undocumented instructions.  */
 #define bfd_mach_r800           11 /* R800: successor with multiplication.  */
   bfd_arch_lm32,      /* Lattice Mico32 */
 #define bfd_mach_lm32      1
   bfd_arch_microblaze,/* Xilinx MicroBlaze. */
   bfd_arch_tilepro,   /* Tilera TILEPro */
   bfd_arch_tilegx, /* Tilera TILE-Gx */
 #define bfd_mach_tilepro   1
 #define bfd_mach_tilegx    1
+#define bfd_mach_tilegx32  2
   bfd_arch_last
   @};
 @end example
 
 @subsection bfd_arch_info
 
 
 @strong{Description}@*
 This structure contains information on architectures for use
 within BFD.
@@ skipping 11 matching lines @@
   unsigned int section_align_power;
   /* TRUE if this is the default machine for the architecture.
      The default arch should be the first entry for an arch so that
      all the entries for that arch can be accessed via @code{next}.  */
   bfd_boolean the_default;
   const struct bfd_arch_info * (*compatible)
     (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
 
   bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
 
+  /* Allocate via bfd_malloc and return a fill buffer of size COUNT.  If
+     IS_BIGENDIAN is TRUE, the order of bytes is big endian.  If CODE is
+     TRUE, the buffer contains code.  */
+  void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian,
+                 bfd_boolean code);
+
   const struct bfd_arch_info *next;
 @}
 bfd_arch_info_type;
 
 @end example
 
 @findex bfd_printable_name
 @subsubsection @code{bfd_printable_name}
 @strong{Synopsis}
 @example
@@ skipping 185 matching lines @@
 @example
 unsigned int bfd_arch_mach_octets_per_byte
    (enum bfd_architecture arch, unsigned long machine);
 @end example
 @strong{Description}@*
 See bfd_octets_per_byte.
 
 This routine is provided for those cases where a bfd * is not
 available
 
+@findex bfd_arch_default_fill
+@subsubsection @code{bfd_arch_default_fill}
+@strong{Synopsis}
+@example
+void *bfd_arch_default_fill (bfd_size_type count,
+    bfd_boolean is_bigendian,
+    bfd_boolean code);
+@end example
+@strong{Description}@*
+Allocate via bfd_malloc and return a fill buffer of size COUNT.
+If IS_BIGENDIAN is TRUE, the order of bytes is big endian.  If
+CODE is TRUE, the buffer contains code.
+