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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 | 5 |
| 6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
| 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
| 8 // on regular desktop machines. | 8 // on regular desktop machines. |
| 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
| 10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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| 261 // Note: Overloaded on the sign of the value. | 261 // Note: Overloaded on the sign of the value. |
| 262 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); | 262 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); |
| 263 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); | 263 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); |
| 264 | 264 |
| 265 inline int ReadW(int32_t addr, Instruction* instr); | 265 inline int ReadW(int32_t addr, Instruction* instr); |
| 266 inline void WriteW(int32_t addr, int value, Instruction* instr); | 266 inline void WriteW(int32_t addr, int value, Instruction* instr); |
| 267 | 267 |
| 268 inline double ReadD(int32_t addr, Instruction* instr); | 268 inline double ReadD(int32_t addr, Instruction* instr); |
| 269 inline void WriteD(int32_t addr, double value, Instruction* instr); | 269 inline void WriteD(int32_t addr, double value, Instruction* instr); |
| 270 | 270 |
| 271 // Helpers for data value tracing. |
| 272 enum TraceType { |
| 273 BYTE, |
| 274 HALF, |
| 275 WORD |
| 276 // DWORD, |
| 277 // DFLOAT - Floats may have printing issues due to paired lwc1's |
| 278 }; |
| 279 |
| 280 void TraceRegWr(int32_t value); |
| 281 void TraceMemWr(int32_t addr, int32_t value, TraceType t); |
| 282 void TraceMemRd(int32_t addr, int32_t value); |
| 283 EmbeddedVector<char, 128> trace_buf_; |
| 284 |
| 271 // Operations depending on endianness. | 285 // Operations depending on endianness. |
| 272 // Get Double Higher / Lower word. | 286 // Get Double Higher / Lower word. |
| 273 inline int32_t GetDoubleHIW(double* addr); | 287 inline int32_t GetDoubleHIW(double* addr); |
| 274 inline int32_t GetDoubleLOW(double* addr); | 288 inline int32_t GetDoubleLOW(double* addr); |
| 275 // Set Double Higher / Lower word. | 289 // Set Double Higher / Lower word. |
| 276 inline int32_t SetDoubleHIW(double* addr); | 290 inline int32_t SetDoubleHIW(double* addr); |
| 277 inline int32_t SetDoubleLOW(double* addr); | 291 inline int32_t SetDoubleLOW(double* addr); |
| 278 | 292 |
| 279 // Executing is handled based on the instruction type. | 293 // Executing is handled based on the instruction type. |
| 280 void DecodeTypeRegister(Instruction* instr); | 294 void DecodeTypeRegister(Instruction* instr); |
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| 469 | 483 |
| 470 static inline void UnregisterCTryCatch() { | 484 static inline void UnregisterCTryCatch() { |
| 471 Simulator::current(Isolate::Current())->PopAddress(); | 485 Simulator::current(Isolate::Current())->PopAddress(); |
| 472 } | 486 } |
| 473 }; | 487 }; |
| 474 | 488 |
| 475 } } // namespace v8::internal | 489 } } // namespace v8::internal |
| 476 | 490 |
| 477 #endif // !defined(USE_SIMULATOR) | 491 #endif // !defined(USE_SIMULATOR) |
| 478 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 492 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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