Fix vm code base so that it can be built for --arch=simarm (no snapshot yet).

runtime/vm/assembler_x64.h

-// Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
+// Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_X64_H_
 #define VM_ASSEMBLER_X64_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_x64.h directly; use assembler.h instead.
 #endif
 
 #include "platform/assert.h"
 #include "platform/utils.h"
 #include "vm/constants_x64.h"
 
 namespace dart {
 
 // Forward declarations.
 class RuntimeEntry;
 
-class Immediate : public ValueObject {
+class Immediate {
  public:
   explicit Immediate(int64_t value) : value_(value) { }
 
+  Immediate(const Immediate& other) : value_(other.value_) { }
+
   int64_t value() const { return value_; }
 
   bool is_int8() const { return Utils::IsInt(8, value_); }
   bool is_uint8() const { return Utils::IsUint(8, value_); }
   bool is_uint16() const { return Utils::IsUint(16, value_); }
   bool is_int32() const { return Utils::IsInt(32, value_); }
 
  private:
   const int64_t value_;
-
-  // TODO(5411081): Add DISALLOW_COPY_AND_ASSIGN(Immediate) once the mac
-  // build issue is resolved.
+  DISALLOW_ALLOCATION()
 };
 
 
-class Operand : public ValueObject {
+class Operand {
  public:
   uint8_t rex() const {
     return rex_;
   }
 
   uint8_t mod() const {
     return (encoding_at(0) >> 6) & 3;
   }
 
   Register rm() const {
@@ skipping 18 matching lines @@
   int8_t disp8() const {
     ASSERT(length_ >= 2);
     return static_cast<int8_t>(encoding_[length_ - 1]);
   }
 
   int32_t disp32() const {
     ASSERT(length_ >= 5);
     return bit_copy<int32_t>(encoding_[length_ - 4]);
   }
 
+  Operand(const Operand& other) : length_(other.length_), rex_(other.rex_) {
+    memmove(&encoding_[0], &other.encoding_[0], other.length_);
+  }
+
+  Operand& operator=(const Operand& other) {
+    length_ = other.length_;
+    rex_ = other.rex_;
+    memmove(&encoding_[0], &other.encoding_[0], other.length_);
+    return *this;
+  }
+
  protected:
-  Operand() : length_(0), rex_(REX_NONE) { }
+  Operand() : length_(0), rex_(REX_NONE) { }  // Needed by subclass Address.
 
   void SetModRM(int mod, Register rm) {
     ASSERT((mod & ~3) == 0);
     if ((rm > 7) && !((rm == R12) && (mod != 3))) {
       rex_ |= REX_B;
     }
     encoding_[0] = (mod << 6) | (rm & 7);
     length_ = 1;
   }
 
@@ skipping 34 matching lines @@
   }
 
   // Returns whether or not this operand is really the given register in
   // disguise. Used from the assembler to generate better encodings.
   bool IsRegister(Register reg) const {
     return ((reg > 7 ? 1 : 0) == (rex_ & REX_B))  // REX.B match.
         && ((encoding_at(0) & 0xF8) == 0xC0)  // Addressing mode is register.
         && ((encoding_at(0) & 0x07) == reg);  // Register codes match.
   }
 
-
   friend class Assembler;
-
-  // TODO(5411081): Add DISALLOW_COPY_AND_ASSIGN(Operand) once the mac
-  // build issue is resolved.
+  DISALLOW_ALLOCATION()
 };
 
 
 class Address : public Operand {
  public:
   Address(Register base, int32_t disp) {
     if ((disp == 0) && ((base & 7) != RBP)) {
       SetModRM(0, base);
       if ((base & 7) == RSP) {
         SetSIB(TIMES_1, RSP, base);
@@ skipping 29 matching lines @@
       SetModRM(1, RSP);
       SetSIB(scale, index, base);
       SetDisp8(disp);
     } else {
       SetModRM(2, RSP);
       SetSIB(scale, index, base);
       SetDisp32(disp);
     }
   }
 
- private:
-  Address() {}
+  Address(const Address& other) : Operand(other) { }
 
-  // TODO(5411081): Add DISALLOW_COPY_AND_ASSIGN(Address) once the mac
-  // build issue is resolved.
+  Address& operator=(const Address& other) {
+    Operand::operator=(other);
+    return *this;
+  }
 };
 
 
 class FieldAddress : public Address {
  public:
   FieldAddress(Register base, int32_t disp)
-      : Address(base, disp - kHeapObjectTag) {}
+      : Address(base, disp - kHeapObjectTag) { }
+
   FieldAddress(Register base, Register index, ScaleFactor scale, int32_t disp)
-      : Address(base, index, scale, disp - kHeapObjectTag) {}
+      : Address(base, index, scale, disp - kHeapObjectTag) { }
+
+  FieldAddress(const FieldAddress& other) : Address(other) { }
+
+  FieldAddress& operator=(const FieldAddress& other) {
+    Address::operator=(other);
+    return *this;
+  }
 };
 
 
 class Label : public ValueObject {
  public:
   Label() : position_(0), unresolved_(0) {
 #ifdef DEBUG
     for (int i = 0; i < kMaxUnresolvedBranches; i++) {
       unresolved_near_positions_[i] = -1;
     }
@@ skipping 58 matching lines @@
   DISALLOW_COPY_AND_ASSIGN(Label);
 };
 
 
 class CPUFeatures : public AllStatic {
  public:
   static void InitOnce();
   // x64 always has at least SSE2.
   static bool sse2_supported() { return true; }
   static bool sse4_1_supported();
+  static bool double_truncate_round_supported() { return sse4_1_supported(); }
 
  private:
   static const uint64_t kSSE4_1BitMask = static_cast<uint64_t>(1) << 51;
 
   static bool sse4_1_supported_;
 #ifdef DEBUG
   static bool initialized_;
 #endif
 };
 
@@ skipping 358 matching lines @@
   // Debugging and bringup support.
   void Stop(const char* message);
   void Unimplemented(const char* message);
   void Untested(const char* message);
   void Unreachable(const char* message);
 
   static void InitializeMemoryWithBreakpoints(uword data, int length);
 
   static const char* RegisterName(Register reg);
 
-  static const char* XmmRegisterName(XmmRegister reg);
+  static const char* FpuRegisterName(FpuRegister reg);
 
  private:
   AssemblerBuffer buffer_;
   int prologue_offset_;
 
   class CodeComment : public ZoneAllocated {
    public:
     CodeComment(intptr_t pc_offset, const String& comment)
         : pc_offset_(pc_offset), comment_(comment) { }
 
@@ skipping 119 matching lines @@
 }
 
 
 inline void Assembler::EmitOperandSizeOverride() {
   EmitUint8(0x66);
 }
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_X64_H_