Fix vm code base so that it can be built for --arch=simarm (no snapshot yet).

runtime/vm/flow_graph_allocator.cc

-// Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
+// Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
 #include "vm/flow_graph_compiler.h"
@@ skipping 53 matching lines @@
     reaching_defs_(flow_graph),
     mint_values_(NULL),
     block_order_(flow_graph.reverse_postorder()),
     postorder_(flow_graph.postorder()),
     live_out_(block_order_.length()),
     kill_(block_order_.length()),
     live_in_(block_order_.length()),
     vreg_count_(flow_graph.max_virtual_register_number()),
     live_ranges_(flow_graph.max_virtual_register_number()),
     cpu_regs_(),
-    xmm_regs_(),
+    fpu_regs_(),
     blocked_cpu_registers_(),
-    blocked_xmm_registers_(),
+    blocked_fpu_registers_(),
     cpu_spill_slot_count_(0) {
   for (intptr_t i = 0; i < vreg_count_; i++) live_ranges_.Add(NULL);
 
   blocked_cpu_registers_[CTX] = true;
   if (TMP != kNoRegister) {
     blocked_cpu_registers_[TMP] = true;
   }
   blocked_cpu_registers_[SPREG] = true;
   blocked_cpu_registers_[FPREG] = true;
 
-  // XMM0 is used as scratch by optimized code and parallel move resolver.
-  blocked_xmm_registers_[XMM0] = true;
+  // FpuTMP is used as scratch by optimized code and parallel move resolver.
+  blocked_fpu_registers_[FpuTMP] = true;
 }
 
 
 // Remove environments from the instructions which can't deoptimize.
 // Replace dead phis uses with null values in environments.
 void FlowGraphAllocator::EliminateEnvironmentUses() {
   ConstantInstr* constant_null =
       postorder_.Last()->AsGraphEntry()->constant_null();
   for (intptr_t i = 0; i < block_order_.length(); ++i) {
     BlockEntryInstr* block = block_order_[i];
@@ skipping 342 matching lines @@
   blocking_ranges[loc.register_code()]->AddUseInterval(from, to);
 }
 
 
 // Block location from the start of the instruction to its end.
 void FlowGraphAllocator::BlockLocation(Location loc,
                                        intptr_t from,
                                        intptr_t to) {
   if (loc.IsRegister()) {
     BlockRegisterLocation(loc, from, to, blocked_cpu_registers_, cpu_regs_);
-  } else if (loc.IsXmmRegister()) {
-    BlockRegisterLocation(loc, from, to, blocked_xmm_registers_, xmm_regs_);
+  } else if (loc.IsFpuRegister()) {
+    BlockRegisterLocation(loc, from, to, blocked_fpu_registers_, fpu_regs_);
   } else {
     UNREACHABLE();
   }
 }
 
 
 void LiveRange::Print() {
   if (first_use_interval() == NULL) {
     return;
   }
@@ skipping 158 matching lines @@
     ConvertAllUses(range);
 
     if (defn->IsParameter() && flow_graph_.num_copied_params() > 0) {
       MarkAsObjectAtSafepoints(range);
     }
   }
 }
 
 
 static Location::Kind RegisterKindFromPolicy(Location loc) {
-  if (loc.policy() == Location::kRequiresXmmRegister) {
-    return Location::kXmmRegister;
+  if (loc.policy() == Location::kRequiresFpuRegister) {
+    return Location::kFpuRegister;
   } else {
     return Location::kRegister;
   }
 }
 
 
 static Location::Kind RegisterKindForResult(Instruction* instr) {
   if ((instr->representation() == kUnboxedDouble) ||
       (instr->representation() == kUnboxedMint)) {
-    return Location::kXmmRegister;
+    return Location::kFpuRegister;
   } else {
     return Location::kRegister;
   }
 }
 
 
 //
 // When describing shape of live ranges in comments below we are going to use
 // the following notation:
 //
@@ skipping 317 matching lines @@
     //              i  i'
     //              [--)
     //
     // The stack bitmap describes the position i.
     for (intptr_t reg = 0; reg < kNumberOfCpuRegisters; reg++) {
       BlockLocation(Location::RegisterLocation(static_cast<Register>(reg)),
                     pos,
                     pos + 1);
     }
 
-    for (intptr_t reg = 0; reg < kNumberOfXmmRegisters; reg++) {
+    for (intptr_t reg = 0; reg < kNumberOfFpuRegisters; reg++) {
       Location::Representation ignored = Location::kDouble;
       BlockLocation(
-          Location::XmmRegisterLocation(static_cast<XmmRegister>(reg), ignored),
+          Location::FpuRegisterLocation(static_cast<FpuRegister>(reg), ignored),
           pos,
           pos + 1);
     }
 
 
 #if defined(DEBUG)
     // Verify that temps, inputs and output were specified as fixed
     // locations.  Every register is blocked now so attempt to
     // allocate will not succeed.
     for (intptr_t j = 0; j < locs->temp_count(); j++) {
@@ skipping 67 matching lines @@
     range->AddHintedUse(pos + 1, move->dest_slot(), out);
   } else if (output_same_as_first_input) {
     // Output register will contain a value of the first input at instruction's
     // start. Expected shape of live ranges:
     //
     //                 i  i'
     //    input #0   --*
     //    output       [----
     //
     ASSERT(locs->in(0).Equals(Location::RequiresRegister()) ||
-           locs->in(0).Equals(Location::RequiresXmmRegister()));
+           locs->in(0).Equals(Location::RequiresFpuRegister()));
 
     // Create move that will copy value between input and output.
     locs->set_out(Location::RequiresRegister());
     MoveOperands* move = AddMoveAt(pos,
                                    Location::RequiresRegister(),
                                    Location::Any());
 
     // Add uses to the live range of the input.
     Definition* input = current->InputAt(0)->definition();
     LiveRange* input_range =
@@ skipping 14 matching lines @@
       interference_set->Add(input->ssa_temp_index());
     }
   } else {
     // Normal unallocated location that requires a register. Expected shape of
     // live range:
     //
     //                    i  i'
     //    output          [-------
     //
     ASSERT(locs->out().Equals(Location::RequiresRegister()) ||
-           locs->out().Equals(Location::RequiresXmmRegister()));
+           locs->out().Equals(Location::RequiresFpuRegister()));
 
     // Shorten live range to the point of definition and add use to be filled by
     // allocator.
     range->DefineAt(pos);
     range->AddUse(pos, out);
   }
 
   AssignSafepoints(range);
   CompleteRange(range, RegisterKindForResult(current));
 }
@@ skipping 190 matching lines @@
 }
 
 
 UsePosition* AllocationFinger::FirstRegisterUse(intptr_t after) {
   for (UsePosition* use = FirstUseAfter(first_register_use_, after);
        use != NULL;
        use = use->next()) {
     Location* loc = use->location_slot();
     if (loc->IsUnallocated() &&
         ((loc->policy() == Location::kRequiresRegister) ||
-        (loc->policy() == Location::kRequiresXmmRegister))) {
+        (loc->policy() == Location::kRequiresFpuRegister))) {
       first_register_use_ = use;
       return use;
     }
   }
   return NULL;
 }
 
 
 UsePosition* AllocationFinger::FirstRegisterBeneficialUse(intptr_t after) {
   for (UsePosition* use = FirstUseAfter(first_register_beneficial_use_, after);
@@ skipping 412 matching lines @@
 
   // We have a very good candidate (either hinted to us or completely free).
   // If we are in a loop try to reduce number of moves on the back edge by
   // searching for a candidate that does not interfere with phis on the back
   // edge.
   BlockInfo* loop_header = BlockInfoAt(unallocated->Start())->loop_header();
   if ((unallocated->vreg() >= 0) &&
       (loop_header != NULL) &&
       (free_until >= loop_header->last_block()->end_pos()) &&
       loop_header->backedge_interference()->Contains(unallocated->vreg())) {
-    ASSERT(static_cast<intptr_t>(kNumberOfXmmRegisters) <=
+    ASSERT(static_cast<intptr_t>(kNumberOfFpuRegisters) <=
            kNumberOfCpuRegisters);
     bool used_on_backedge[kNumberOfCpuRegisters] = { false };
 
     for (PhiIterator it(loop_header->entry()->AsJoinEntry());
          !it.Done();
          it.Advance()) {
       PhiInstr* phi = it.Current();
       if (phi->is_alive()) {
         const intptr_t phi_vreg = phi->ssa_temp_index();
         LiveRange* range = GetLiveRange(phi_vreg);
@@ skipping 430 matching lines @@
   AddToSortedListOfRanges(&unallocated_, range);
 }
 
 
 void FlowGraphAllocator::CompleteRange(LiveRange* range, Location::Kind kind) {
   switch (kind) {
     case Location::kRegister:
       AddToSortedListOfRanges(&unallocated_cpu_, range);
       break;
 
-    case Location::kXmmRegister:
+    case Location::kFpuRegister:
       AddToSortedListOfRanges(&unallocated_xmm_, range);
       break;
 
     default:
       UNREACHABLE();
   }
 }
 
 
 #if defined(DEBUG)
@@ skipping 263 matching lines @@
   PrepareForAllocation(Location::kRegister,
                        kNumberOfCpuRegisters,
                        unallocated_cpu_,
                        cpu_regs_,
                        blocked_cpu_registers_);
   AllocateUnallocatedRanges();
 
   cpu_spill_slot_count_ = spill_slots_.length();
   spill_slots_.Clear();
 
-  PrepareForAllocation(Location::kXmmRegister,
-                       kNumberOfXmmRegisters,
+  PrepareForAllocation(Location::kFpuRegister,
+                       kNumberOfFpuRegisters,
                        unallocated_xmm_,
-                       xmm_regs_,
-                       blocked_xmm_registers_);
+                       fpu_regs_,
+                       blocked_fpu_registers_);
   AllocateUnallocatedRanges();
 
   ResolveControlFlow();
 
   GraphEntryInstr* entry = block_order_[0]->AsGraphEntry();
   ASSERT(entry != NULL);
   intptr_t double_spill_slot_count =
       spill_slots_.length() * kDoubleSpillSlotFactor;
   entry->set_spill_slot_count(cpu_spill_slot_count_ + double_spill_slot_count);
 
   if (FLAG_print_ssa_liveranges) {
     const Function& function = flow_graph_.parsed_function().function();
 
     OS::Print("-- [after ssa allocator] ranges [%s] ---------\n",
               function.ToFullyQualifiedCString());
     PrintLiveRanges();
     OS::Print("----------------------------------------------\n");
 
     OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
               function.ToFullyQualifiedCString());
     FlowGraphPrinter printer(flow_graph_, true);
     printer.PrintBlocks();
     OS::Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart