VM: New calling convention for generated code.

runtime/vm/disassembler_arm.cc

Index: runtime/vm/disassembler_arm.cc
diff --git a/runtime/vm/disassembler_arm.cc b/runtime/vm/disassembler_arm.cc
index 63f759bbba66b4087d97a42ff019f65d4005bd91..93ff293b4fae28bf7a388f29fb864c6d5c304875 100644
--- a/runtime/vm/disassembler_arm.cc
+++ b/runtime/vm/disassembler_arm.cc
@@ -109,11 +109,11 @@ void ARMDecoder::PrintCondition(Instr* instr) {
 
 
 // These register names are defined in a way to match the native disassembler
-// formatting, except for register aliases ctx (r9) and pp (r10).
+// formatting, except for register alias pp (r9).
 // See for example the command "objdump -d <binary file>".
 static const char* reg_names[kNumberOfCpuRegisters] = {
   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
-  "r8", "ctx", "pp", "fp", "ip", "sp", "lr", "pc",
+  "r8", "pp", "r10", "fp", "ip", "sp", "lr", "pc",
 };