Add a basic enum for ARM InstructionSet / cpu features.

src/IceTargetLoweringX8632.h

 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the TargetLoweringX8632 class, which
@@ skipping 544 matching lines @@
   }
   void _xor(Variable *Dest, Operand *Src0) {
     Context.insert(InstX8632Xor::create(Func, Dest, Src0));
   }
   void _set_dest_nonkillable() {
     Context.getLastInserted()->setDestNonKillable();
   }
 
   bool optimizeScalarMul(Variable *Dest, Operand *Src0, int32_t Src1);
 
-  const X86InstructionSet InstructionSet;
+  X86InstructionSet InstructionSet;
   bool IsEbpBasedFrame;
   bool NeedsStackAlignment;
   size_t SpillAreaSizeBytes;
   llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
   llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   VarList PhysicalRegisters[IceType_NUM];
   static IceString RegNames[];
 
 private:
@@ skipping 35 matching lines @@
 protected:
   explicit TargetHeaderX8632(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderX8632() = default;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H