Add remaining instructions to whitelist

lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp

Index: lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp
diff --git a/lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp b/lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp
index abc66b0addca49ac34139b9250abcb9f4462b4e4..cf878dc66007725ae22f6e7327e9c695874c315d 100644
--- a/lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp
+++ b/lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp
@@ -42,19 +42,78 @@ bool PNaClABIVerifyFunctions::runOnFunction(Function &F) {
     for (BasicBlock::const_iterator BBI = FI->begin(), BBE = FI->end();
              BBI != BBE; ++BBI) {
       switch (BBI->getOpcode()) {
+        // Disallowed instructions. Default is to disallow.
+        default:
+        // indirectbr may interfere with streaming
+        case Instruction::IndirectBr:
+        // No vector instructions yet
+        case Instruction::ExtractElement:
+        case Instruction::InsertElement:
+        case Instruction::ShuffleVector:
+          errs() << Twine("Function ") + F.getName() +
+              " has disallowed instruction: " +
+              BBI->getOpcodeName() + "\n";
+          break;
+
         // Terminator instructions
         case Instruction::Ret:
         case Instruction::Br:
         case Instruction::Switch:
         case Instruction::Resume:
         case Instruction::Unreachable:
-          // indirectbr is not allowed for now.
-          // invoke and call are handled separately.
+        case Instruction::Invoke:
+        // Binary operations
+        case Instruction::Add:
+        case Instruction::FAdd:
+        case Instruction::Sub:
+        case Instruction::FSub:
+        case Instruction::Mul:
+        case Instruction::FMul:
+        case Instruction::UDiv:
+        case Instruction::SDiv:
+        case Instruction::FDiv:
+        case Instruction::URem:
+        case Instruction::SRem:
+        case Instruction::FRem:
+        // Bitwise binary operations
+        case Instruction::Shl:
+        case Instruction::LShr:
+        case Instruction::AShr:
+        case Instruction::And:
+        case Instruction::Or:
+        case Instruction::Xor:
+        case Instruction::ExtractValue:
+        case Instruction::InsertValue:
+        // Memory instructions
+        case Instruction::Alloca:
+        case Instruction::Load:
+        case Instruction::Store:
+        case Instruction::Fence:
+        case Instruction::AtomicCmpXchg:
+        case Instruction::AtomicRMW:
+        case Instruction::GetElementPtr:
+        // Conversion operations
+        case Instruction::Trunc:
+        case Instruction::ZExt:
+        case Instruction::SExt:
+        case Instruction::FPTrunc:
+        case Instruction::FPExt:
+        case Instruction::FPToUI:
+        case Instruction::FPToSI:
+        case Instruction::UIToFP:
+        case Instruction::SIToFP:
+        case Instruction::PtrToInt:
+        case Instruction::IntToPtr:
+        case Instruction::BitCast:
+        // Other operations
+        case Instruction::ICmp:
+        case Instruction::FCmp:
+        case Instruction::PHI:
+        case Instruction::Select:
+        case Instruction::Call:
+        case Instruction::VAArg:
+        case Instruction::LandingPad:
           break;
-        default:
-          errs() << Twine("Function ") + F.getName() +
-              " has disallowed instruction: " +
-              BBI->getOpcodeName() + "\n";
       }
     }
   }