lib/Analysis/NaCl/PNaClABIVerifyFunctions.cpp - Issue 11896044: Add remaining instructions to whitelist

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Issue 11896044: Add remaining instructions to whitelist (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master

Patch Set: put back default Created 7 years, 11 months ago

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1 //===- PNaClABIVerifyFunctions.cpp - Verify PNaCl ABI rules --------===//	1 //===- PNaClABIVerifyFunctions.cpp - Verify PNaCl ABI rules --------===//

2 //	2 //

3 // The LLVM Compiler Infrastructure	3 // The LLVM Compiler Infrastructure

4 //	4 //

5 // This file is distributed under the University of Illinois Open Source	5 // This file is distributed under the University of Illinois Open Source

6 // License. See LICENSE.TXT for details.	6 // License. See LICENSE.TXT for details.

7 //	7 //

8 //===----------------------------------------------------------------------===//	8 //===----------------------------------------------------------------------===//

9 //	9 //

10 // Verify function-level PNaCl ABI requirements.	10 // Verify function-level PNaCl ABI requirements.

(...skipping 30 matching lines...) Expand all Loading...
41 FI != FE; ++FI) {	41 FI != FE; ++FI) {

42 for (BasicBlock::const_iterator BBI = FI->begin(), BBE = FI->end();	42 for (BasicBlock::const_iterator BBI = FI->begin(), BBE = FI->end();

43 BBI != BBE; ++BBI) {	43 BBI != BBE; ++BBI) {

44 switch (BBI->getOpcode()) {	44 switch (BBI->getOpcode()) {

45 // Terminator instructions	45 // Terminator instructions

46 case Instruction::Ret:	46 case Instruction::Ret:

47 case Instruction::Br:	47 case Instruction::Br:

48 case Instruction::Switch:	48 case Instruction::Switch:

49 case Instruction::Resume:	49 case Instruction::Resume:

50 case Instruction::Unreachable:	50 case Instruction::Unreachable:

51 // indirectbr is not allowed for now.	51 case Instruction::Invoke:

52 // invoke and call are handled separately.	52 // Binary operations

	53 case Instruction::Add:

	54 case Instruction::FAdd:

	55 case Instruction::Sub:

	56 case Instruction::FSub:

	57 case Instruction::Mul:

	58 case Instruction::FMul:

	59 case Instruction::UDiv:

	60 case Instruction::SDiv:

	61 case Instruction::FDiv:

	62 case Instruction::URem:

	63 case Instruction::SRem:

	64 case Instruction::FRem:

	65 // Bitwise binary operations

	66 case Instruction::Shl:

	67 case Instruction::LShr:

	68 case Instruction::AShr:

	69 case Instruction::And:

	70 case Instruction::Or:

	71 case Instruction::Xor:

	72 case Instruction::ExtractValue:

	73 case Instruction::InsertValue:

	74 // Memory instructions

	75 case Instruction::Alloca:

	76 case Instruction::Load:

	77 case Instruction::Store:

	78 case Instruction::Fence:

	79 case Instruction::AtomicCmpXchg:

	80 case Instruction::AtomicRMW:

	81 case Instruction::GetElementPtr:

	82 // Conversion operations

	83 case Instruction::Trunc:

	84 case Instruction::ZExt:

	85 case Instruction::SExt:

	86 case Instruction::FPTrunc:

	87 case Instruction::FPExt:

	88 case Instruction::FPToUI:

	89 case Instruction::FPToSI:

	90 case Instruction::UIToFP:

	91 case Instruction::SIToFP:

	92 case Instruction::PtrToInt:

	93 case Instruction::IntToPtr:

	94 case Instruction::BitCast:

	95 // Other operations

	96 case Instruction::ICmp:

	97 case Instruction::FCmp:

	98 case Instruction::PHI:

	99 case Instruction::Select:

	100 case Instruction::Call:

	101 case Instruction::VAArg:

	102 case Instruction::LandingPad:

53 break;	103 break;

	104 // Disallowed instructions

	105 // indirectbr may interfere with streaming

	106 case Instruction::IndirectBr:

	107 // No vector instructions yet

	108 case Instruction::ExtractElement:

	109 case Instruction::InsertElement:

	110 case Instruction::ShuffleVector:

54 default:	111 default:
	eliben 2013/01/22 22:52:56 I think the LLVM convention is to have "default" a I think the LLVM convention is to have "default" as the first clause in a switch.
55 errs() << Twine("Function ") + F.getName() +	112 errs() << Twine("Function ") + F.getName() +

56 " has disallowed instruction: " +	113 " has disallowed instruction: " +

57 BBI->getOpcodeName() + "\n";	114 BBI->getOpcodeName() + "\n";

	115 break;

58 }	116 }

59 }	117 }

60 }	118 }

61 return false;	119 return false;

62 }	120 }

63	121

64 char PNaClABIVerifyFunctions::ID = 0;	122 char PNaClABIVerifyFunctions::ID = 0;

65	123

66 static RegisterPass<PNaClABIVerifyFunctions> X("verify-pnaclabi-functions",	124 static RegisterPass<PNaClABIVerifyFunctions> X("verify-pnaclabi-functions",

67 "Verify functions for PNaCl", false, false);	125 "Verify functions for PNaCl", false, false);

68	126

69 FunctionPass *llvm::createPNaClABIVerifyFunctionsPass() {	127 FunctionPass *llvm::createPNaClABIVerifyFunctionsPass() {

70 return new PNaClABIVerifyFunctions();	128 return new PNaClABIVerifyFunctions();

71 }	129 }

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