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Issue 11896044:
Add remaining instructions to whitelist (Closed)
Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master| OLD | NEW |
|---|---|
| 1 //===- PNaClABIVerifyFunctions.cpp - Verify PNaCl ABI rules --------===// | 1 //===- PNaClABIVerifyFunctions.cpp - Verify PNaCl ABI rules --------===// |
| 2 // | 2 // |
| 3 // The LLVM Compiler Infrastructure | 3 // The LLVM Compiler Infrastructure |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // Verify function-level PNaCl ABI requirements. | 10 // Verify function-level PNaCl ABI requirements. |
| (...skipping 30 matching lines...) Expand all Loading... | |
| 41 FI != FE; ++FI) { | 41 FI != FE; ++FI) { |
| 42 for (BasicBlock::const_iterator BBI = FI->begin(), BBE = FI->end(); | 42 for (BasicBlock::const_iterator BBI = FI->begin(), BBE = FI->end(); |
| 43 BBI != BBE; ++BBI) { | 43 BBI != BBE; ++BBI) { |
| 44 switch (BBI->getOpcode()) { | 44 switch (BBI->getOpcode()) { |
| 45 // Terminator instructions | 45 // Terminator instructions |
| 46 case Instruction::Ret: | 46 case Instruction::Ret: |
| 47 case Instruction::Br: | 47 case Instruction::Br: |
| 48 case Instruction::Switch: | 48 case Instruction::Switch: |
| 49 case Instruction::Resume: | 49 case Instruction::Resume: |
| 50 case Instruction::Unreachable: | 50 case Instruction::Unreachable: |
| 51 case Instruction::Invoke: | |
| 51 // indirectbr is not allowed for now. | 52 // indirectbr is not allowed for now. |
| 52 // invoke and call are handled separately. | 53 // Binary operations |
| 54 case Instruction::Add: | |
| 55 case Instruction::FAdd: | |
| 56 case Instruction::Sub: | |
| 57 case Instruction::FSub: | |
| 58 case Instruction::Mul: | |
| 59 case Instruction::FMul: | |
| 60 case Instruction::UDiv: | |
| 61 case Instruction::SDiv: | |
| 62 case Instruction::FDiv: | |
| 63 case Instruction::URem: | |
| 64 case Instruction::SRem: | |
| 65 case Instruction::FRem: | |
| 66 // Bitwise binary operations | |
| 67 case Instruction::Shl: | |
| 68 case Instruction::LShr: | |
| 69 case Instruction::AShr: | |
| 70 case Instruction::And: | |
| 71 case Instruction::Or: | |
| 72 case Instruction::Xor: | |
| 73 // No vector instructions yet | |
| 74 case Instruction::ExtractValue: | |
| 75 case Instruction::InsertValue: | |
| 76 // Memory instructions | |
| 77 case Instruction::Alloca: | |
| 78 case Instruction::Load: | |
| 79 case Instruction::Store: | |
| 80 case Instruction::Fence: | |
| 81 case Instruction::AtomicCmpXchg: | |
| 82 case Instruction::AtomicRMW: | |
| 83 case Instruction::GetElementPtr: | |
| 84 // Conversion operations | |
| 85 case Instruction::Trunc: | |
| 86 case Instruction::ZExt: | |
| 87 case Instruction::SExt: | |
| 88 case Instruction::FPTrunc: | |
| 89 case Instruction::FPExt: | |
| 90 case Instruction::FPToUI: | |
| 91 case Instruction::FPToSI: | |
| 92 case Instruction::UIToFP: | |
| 93 case Instruction::SIToFP: | |
| 94 case Instruction::PtrToInt: | |
| 95 case Instruction::IntToPtr: | |
| 96 case Instruction::BitCast: | |
| 97 // Other operations | |
| 98 case Instruction::ICmp: | |
| 99 case Instruction::FCmp: | |
| 100 case Instruction::PHI: | |
| 101 case Instruction::Select: | |
| 102 case Instruction::Call: | |
| 103 case Instruction::VAArg: | |
| 104 case Instruction::LandingPad: | |
| 53 break; | 105 break; |
| 54 default: | 106 default: |
|
Mark Seaborn
2013/01/22 21:44:18
If you remove the "default:", we should get werror
Derek Schuff
2013/01/22 22:13:09
Done. It's still a good idea, but
1) LLVM doesn't
| |
| 55 errs() << Twine("Function ") + F.getName() + | 107 errs() << Twine("Function ") + F.getName() + |
| 56 " has disallowed instruction: " + | 108 " has disallowed instruction: " + |
| 57 BBI->getOpcodeName() + "\n"; | 109 BBI->getOpcodeName() + "\n"; |
| 58 } | 110 } |
| 59 } | 111 } |
| 60 } | 112 } |
| 61 return false; | 113 return false; |
| 62 } | 114 } |
| 63 | 115 |
| 64 char PNaClABIVerifyFunctions::ID = 0; | 116 char PNaClABIVerifyFunctions::ID = 0; |
| 65 | 117 |
| 66 static RegisterPass<PNaClABIVerifyFunctions> X("verify-pnaclabi-functions", | 118 static RegisterPass<PNaClABIVerifyFunctions> X("verify-pnaclabi-functions", |
| 67 "Verify functions for PNaCl", false, false); | 119 "Verify functions for PNaCl", false, false); |
| 68 | 120 |
| 69 FunctionPass *llvm::createPNaClABIVerifyFunctionsPass() { | 121 FunctionPass *llvm::createPNaClABIVerifyFunctionsPass() { |
| 70 return new PNaClABIVerifyFunctions(); | 122 return new PNaClABIVerifyFunctions(); |
| 71 } | 123 } |
| OLD | NEW |
