ARM: Assign "actuals" at call site to the appropriate GPR/stack slot.

src/IceTargetLoweringARM32.h

Index: src/IceTargetLoweringARM32.h
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h
index 1fa3ce24285db490a96f5d38da027095531024e8..5eb320f25a4910140ec0a0fbe1886125fd3586a6 100644
--- a/src/IceTargetLoweringARM32.h
+++ b/src/IceTargetLoweringARM32.h
@@ -159,6 +159,10 @@ protected:
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32Adc::create(Func, Dest, Src0, Src1, Pred));
   }
+  void _adjust_stack(int32_t Amount, Operand *SrcAmount) {
+    Context.insert(InstARM32AdjustStack::create(
+        Func, getPhysicalRegister(RegARM32::Reg_sp), Amount, SrcAmount));
+  }
   void _and(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert(InstARM32And::create(Func, Dest, Src0, Src1, Pred));
@@ -309,6 +313,33 @@ protected:
   VarList PhysicalRegisters[IceType_NUM];
   static IceString RegNames[];
 
+  // Helper class that understands the Calling Convention and register
+  // assignments. The first few integer type parameters can use r0-r3,
+  // regardless of their position relative to the floating-point/vector
+  // arguments in the argument list. Floating-point and vector arguments
+  // can use q0-q3 (aka d0-d7, s0-s15). Technically, arguments that can
+  // start with registers but extend beyond the available registers can be
+  // split between the registers and the stack. However, this is typically
+  // for passing GPR structs by value, and PNaCl transforms expand this out.
+  //
+  // Also, at the point before the call, the stack must be aligned.
+  class CallingConv {
+    CallingConv(const CallingConv &) = delete;
+    CallingConv &operator=(const CallingConv &) = delete;
+
+  public:
+    CallingConv() : NumGPRRegsUsed(0) {}
+    ~CallingConv() = default;
+
+    bool I64InRegs(std::pair<int32_t, int32_t> *Regs);
+    bool I32InReg(int32_t *Reg);
+
+    static constexpr uint32_t ARM32_MAX_GPR_ARG = 4;
+
+  private:
+    uint32_t NumGPRRegsUsed;
+  };
+
 private:
   ~TargetARM32() override {}
 };