ARM: Assign "actuals" at call site to the appropriate GPR/stack slot.

tests_lit/llvm2ice_tests/globalinit.pnacl.ll

 ; Test of global initializers.
 
 ; REQUIRES: allow_dump
 
 ; Test initializers with -filetype=asm.
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=asm --target x8632 \
 ; RUN:   -i %s --args -O2 | %if --need=target_X8632 --command FileCheck %s
 
 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --target arm32 \
 ; RUN:   -i %s --args -O2 --skip-unimplemented \
 ; RUN:   | %if --need=target_ARM32 --command FileCheck %s
 
 ; Test instructions for materializing addresses.
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=asm --target x8632 \
 ; RUN:   -i %s --args -O2 \
 ; RUN: | %if --need=target_X8632 --command FileCheck %s --check-prefix=X8632
 
 ; Test instructions with -filetype=obj and try to cross reference instructions
 ; w/ the symbol table.
 ; RUN: %if --need=target_X8632 --command %p2i --assemble --disassemble \
 ; RUN:   --target x8632 -i %s --args --verbose none \
 ; RUN:   | %if --need=target_X8632 --command FileCheck --check-prefix=IAS %s
 
 ; RUN: %if --need=target_X8632 --command %p2i --assemble --disassemble \
 ; RUN:   --dis-flags=-t --target x8632 -i %s --args --verbose none \
 ; RUN:   | %if --need=target_X8632 --command FileCheck --check-prefix=SYMTAB %s
 
-; Only checking symtab for ARM for now. TODO(jvoung): Need to lower
-; arguments at callsite.
+; This is not really IAS, but we can switch when that is implemented.
+; For now we can at least see the instructions / relocations.
+; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
+; RUN:   --disassemble --target arm32 -i %s \
+; RUN:   --args --verbose none --skip-unimplemented \
+; RUN:   | %if --need=target_ARM32 --command FileCheck \
+; RUN:   --check-prefix=IASARM32 %s
+
 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=asm --assemble \
 ; RUN:   --disassemble --dis-flags=-t --target arm32 -i %s \
 ; RUN:   --args --verbose none --skip-unimplemented \
 ; RUN:   | %if --need=target_ARM32 --command FileCheck --check-prefix=SYMTAB %s
 
 define internal i32 @main(i32 %argc, i32 %argv) {
 entry:
   %expanded1 = ptrtoint [4 x i8]* @PrimitiveInit to i32
   call void @use(i32 %expanded1)
   %expanded3 = ptrtoint [4 x i8]* @PrimitiveInitConst to i32
@@ skipping 22 matching lines @@
 ; objdump does not indicate what symbol the mov/relocation applies to
 ; so we grep for "mov {{.*}}, OFFSET, sec", along with
 ; "OFFSET {{.*}} sec {{.*}} symbol" in the symbol table as a sanity check.
 ; NOTE: The symbol table sorting has no relation to the code's references.
 ; IAS-LABEL: main
 ; SYMTAB-LABEL: SYMBOL TABLE
 
 ; SYMTAB-DAG: 00000000 {{.*}} .data {{.*}} PrimitiveInit
 ; IAS: mov {{.*}},0x0 {{.*}} .data
 ; IAS: call
+; IASARM32: movw {{.*}} PrimitiveInit
+; IASARM32: movt {{.*}} PrimitiveInit
+; IASARM32: bl
 
 ; SYMTAB-DAG: 00000000 {{.*}} .rodata {{.*}} PrimitiveInitConst
 ; IAS: mov {{.*}},0x0 {{.*}} .rodata
 ; IAS: call
+; IASARM32: movw {{.*}} PrimitiveInitConst
+; IASARM32: movt {{.*}} PrimitiveInitConst
+; IASARM32: bl
 
 ; SYMTAB-DAG: 00000000 {{.*}} .bss {{.*}} PrimitiveInitStatic
 ; IAS: mov {{.*}},0x0 {{.*}} .bss
 ; IAS: call
+; IASARM32: movw {{.*}} PrimitiveInitStatic
+; IASARM32: movt {{.*}} PrimitiveInitStatic
+; IASARM32: bl
 
 ; SYMTAB-DAG: 00000004 {{.*}} .bss {{.*}} PrimitiveUninit
 ; IAS: mov {{.*}},0x4 {{.*}} .bss
 ; IAS: call
+; IASARM32: movw {{.*}} PrimitiveUninit
+; IASARM32: movt {{.*}} PrimitiveUninit
+; IASARM32: bl
 
 ; SYMTAB-DAG: 00000004{{.*}}.data{{.*}}ArrayInit
 ; IAS: mov {{.*}},0x4 {{.*}} .data
 ; IAS: call
+; IASARM32: movw {{.*}} ArrayInit
+; IASARM32: movt {{.*}} ArrayInit
+; IASARM32: bl
 
 ; SYMTAB-DAG: 00000018 {{.*}} .data {{.*}} ArrayInitPartial
 ; IAS: mov {{.*}},0x18 {{.*}} .data
 ; IAS: call
+; IASARM32: movw {{.*}} ArrayInitPartial
+; IASARM32: movt {{.*}} ArrayInitPartial
+; IASARM32: bl
 
 ; SYMTAB-DAG: 00000008 {{.*}} .bss {{.*}} ArrayUninit
 ; IAS: mov {{.*}},0x8 {{.*}} .bss
 ; IAS: call
-
+; IASARM32: movw {{.*}} ArrayUninit
+; IASARM32: movt {{.*}} ArrayUninit
+; IASARM32: bl
 
 declare void @use(i32)
 
 define internal i32 @nacl_tp_tdb_offset(i32 %__0) {
 entry:
   ret i32 0
 }
 
 define internal i32 @nacl_tp_tls_offset(i32 %size) {
 entry:
@@ skipping 71 matching lines @@
 ; CHECK: .section .rodata,"a",%progbits
 ; CHECK-NEXT: .p2align 2
 ; CHECK-NEXT: ArrayUninitConstInt:
 ; CHECK-NEXT: .zero 20
 ; CHECK-NEXT: .size ArrayUninitConstInt, 20
 
 @__init_array_start = internal constant [0 x i8] zeroinitializer, align 4
 @__fini_array_start = internal constant [0 x i8] zeroinitializer, align 4
 @__tls_template_start = internal constant [0 x i8] zeroinitializer, align 8
 @__tls_template_alignment = internal constant [4 x i8] c"\01\00\00\00", align 4