MIPS: Fix for Remove unsafe EmitLoadRegister usage in AddI/SubI for constant right operand.

src/mips/macro-assembler-mips.cc

Index: src/mips/macro-assembler-mips.cc
diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc
index 190af3b8768e87831e0e7fbf12c96e3d860b382f..0b2bbf85c95d8d2225780fa17c0734db2f6bbc84 100644
--- a/src/mips/macro-assembler-mips.cc
+++ b/src/mips/macro-assembler-mips.cc
@@ -4459,7 +4459,7 @@ void MacroAssembler::AdduAndCheckForOverflow(Register dst, Register left,
       xor_(overflow_dst, dst, t9);
       and_(overflow_dst, overflow_dst, scratch);
     } else {
-      addiu(dst, left, right.immediate());
+      Addu(dst, left, right.immediate());
       xor_(overflow_dst, dst, left);
       // Load right since xori takes uint16 as immediate.
       Addu(t9, zero_reg, right);