Optimize the emitted instruction of random function for X64

Optimize the emitted instruction of random for X64

[Jakob Kummerow, 2013-01-11 17:43:38]

https://codereview.chromium.org/11852007/diff/1/src/x64/assembler-x64.h
File src/x64/assembler-x64.h (right):

https://codereview.chromium.org/11852007/diff/1/src/x64/assembler-x64.h#newco...
src/x64/assembler-x64.h:422: explicit Operand(Register reg);
On x64 so far, an Operand always means a memory access, and I'd like to keep
that consistency. So please don't add this constructor. Instead, please
implement an overloaded version of movzxwl that takes two registers as input
(similar to how we have two versions of movsxlq).

https://codereview.chromium.org/11852007/diff/1/src/x64/lithium-codegen-x64.cc
File src/x64/lithium-codegen-x64.cc (right):

https://codereview.chromium.org/11852007/diff/1/src/x64/lithium-codegen-x64.c...
src/x64/lithium-codegen-x64.cc:3597: __ movl(rcx, FieldOperand(rbx,
ByteArray::kHeaderSize));
Is there a reason you're swapping usage of rax and rcx?

[weiliang.lin2, 2013-01-12 13:55:30]

On 2013/01/11 17:43:38, Jakob wrote:
> https://codereview.chromium.org/11852007/diff/1/src/x64/assembler-x64.h
> File src/x64/assembler-x64.h (right):
> 
>
https://codereview.chromium.org/11852007/diff/1/src/x64/assembler-x64.h#newco...
> src/x64/assembler-x64.h:422: explicit Operand(Register reg);
> On x64 so far, an Operand always means a memory access, and I'd like to keep
> that consistency. So please don't add this constructor. Instead, please
> implement an overloaded version of movzxwl that takes two registers as input
> (similar to how we have two versions of movsxlq).
> 
> https://codereview.chromium.org/11852007/diff/1/src/x64/lithium-codegen-x64.cc
> File src/x64/lithium-codegen-x64.cc (right):
> 
>
https://codereview.chromium.org/11852007/diff/1/src/x64/lithium-codegen-x64.c...
> src/x64/lithium-codegen-x64.cc:3597: __ movl(rcx, FieldOperand(rbx,
> ByteArray::kHeaderSize));
> Is there a reason you're swapping usage of rax and rcx?

Hi Jakob,
Thanks for review
Upload the change based on comment. Please review again. 
For the swapping of rax and rcx, it is to save one byte JIT code when emitting
'and reg, 0x3fffff'. A small improve

[Sven Panne, 2013-01-15 11:34:45]

Quick drive-by-comment: Every time a new instruction is added to the assembler,
the disassembler *must* be changed to handle this as well...

[Jakob Kummerow, 2013-01-15 12:26:48]

On 2013/01/15 11:34:45, Sven Panne wrote:
> Quick drive-by-comment: Every time a new instruction is added to the
assembler,
> the disassembler *must* be changed to handle this as well...

Not in this case -- it's not a completely new instruction, just a new
combination of arguments. Our disassembler handles this without requiring
changes.

Patch set 2 LGTM.

[Jakob Kummerow, 2013-01-17 13:34:12]

Patch set 3 LGTM, landing (again).

For the record, patch set 2 was landed and then reverted due to crashing on
Win64. Patch set 3 is supposed to fix that problem.