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Side by Side Diff: tests_lit/llvm2ice_tests/rmw.ll

Issue 1182603004: Subzero: Transform suitable Load/Arith/Store sequences into RMW ops. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes Created 5 years, 6 months ago
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1 ; This tests Read-Modify-Write (RMW) detection and lowering at the O2
2 ; optimization level.
3
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
5 ; RUN: --target x8632 -i %s --args -O2 \
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s
7
8 define internal void @rmw_add_i32_var(i32 %addr_arg, i32 %var) {
9 entry:
10 %addr = inttoptr i32 %addr_arg to i32*
11 %val = load i32, i32* %addr, align 1
12 %rmw = add i32 %val, %var
13 store i32 %rmw, i32* %addr, align 1
14 ret void
15 }
16 ; Look for something like: add DWORD PTR [eax],ecx
17 ; CHECK-LABEL: rmw_add_i32_var
18 ; CHECK: add DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],e{{ax|bx|cx|dx|bp|di|si}}
19
20 define internal void @rmw_add_i32_imm(i32 %addr_arg) {
21 entry:
22 %addr = inttoptr i32 %addr_arg to i32*
23 %val = load i32, i32* %addr, align 1
24 %rmw = add i32 %val, 19
25 store i32 %rmw, i32* %addr, align 1
26 ret void
27 }
28 ; Look for something like: add DWORD PTR [eax],0x13
29 ; CHECK-LABEL: rmw_add_i32_imm
30 ; CHECK: add DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x13
31
32 define internal i32 @no_rmw_add_i32_var(i32 %addr_arg, i32 %var) {
33 entry:
34 %addr = inttoptr i32 %addr_arg to i32*
35 %val = load i32, i32* %addr, align 1
36 %rmw = add i32 %val, %var
37 store i32 %rmw, i32* %addr, align 1
38 ret i32 %rmw
39 }
40 ; CHECK-LABEL: no_rmw_add_i32_var
41 ; CHECK: add e{{ax|bx|cx|dx|bp|di|si}},DWORD PTR [e{{ax|bx|cx|dx|bp|di|si}}]
42
43 define internal void @rmw_add_i16_var(i32 %addr_arg, i16 %var) {
44 entry:
45 %addr = inttoptr i32 %addr_arg to i16*
46 %val = load i16, i16* %addr, align 1
47 %rmw = add i16 %val, %var
48 store i16 %rmw, i16* %addr, align 1
49 ret void
50 }
51 ; Look for something like: add WORD PTR [eax],cx
52 ; CHECK-LABEL: rmw_add_i16_var
53 ; CHECK: add WORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],{{ax|bx|cx|dx|bp|di|si}}
54
55 define internal void @rmw_add_i16_imm(i32 %addr_arg) {
56 entry:
57 %addr = inttoptr i32 %addr_arg to i16*
58 %val = load i16, i16* %addr, align 1
59 %rmw = add i16 %val, 19
60 store i16 %rmw, i16* %addr, align 1
61 ret void
62 }
63 ; Look for something like: add WORD PTR [eax],0x13
64 ; CHECK-LABEL: rmw_add_i16_imm
65 ; CHECK: add WORD PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x13
66
67 define internal void @rmw_add_i8_var(i32 %addr_arg, i8 %var) {
68 entry:
69 %addr = inttoptr i32 %addr_arg to i8*
70 %val = load i8, i8* %addr, align 1
71 %rmw = add i8 %val, %var
72 store i8 %rmw, i8* %addr, align 1
73 ret void
74 }
75 ; Look for something like: add BYTE PTR [eax],cl
76 ; CHECK-LABEL: rmw_add_i8_var
77 ; CHECK: add BYTE PTR [e{{ax|bx|cx|dx|bp|di|si}}],{{al|bl|cl|dl}}
78
79 define internal void @rmw_add_i8_imm(i32 %addr_arg) {
80 entry:
81 %addr = inttoptr i32 %addr_arg to i8*
82 %val = load i8, i8* %addr, align 1
83 %rmw = add i8 %val, 19
84 store i8 %rmw, i8* %addr, align 1
85 ret void
86 }
87 ; Look for something like: add BYTE PTR [eax],0x13
88 ; CHECK-LABEL: rmw_add_i8_imm
89 ; CHECK: add BYTE PTR [e{{ax|bx|cx|dx|bp|di|si}}],0x13
90
91 define internal void @rmw_add_i32_var_addropt(i32 %addr_arg, i32 %var) {
92 entry:
93 %addr_arg_plus_12 = add i32 %addr_arg, 12
94 %var_times_4 = mul i32 %var, 4
95 %addr_base = add i32 %addr_arg_plus_12 , %var_times_4
96 %addr = inttoptr i32 %addr_base to i32*
97 %val = load i32, i32* %addr, align 1
98 %rmw = add i32 %val, %var
99 store i32 %rmw, i32* %addr, align 1
100 ret void
101 }
102 ; Look for something like: add DWORD PTR [eax+ecx*4+12],ecx
103 ; CHECK-LABEL: rmw_add_i32_var_addropt
104 ; CHECK: add DWORD PTR [e{{..}}+e{{..}}*4+0xc],e{{ax|bx|cx|dx|bp|di|si}}
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