Subzero: Transform suitable Load/Arith/Store sequences into RMW ops.

src/IceAssemblerX8632.cpp

 //===- subzero/src/IceAssemblerX8632.cpp - Assembler for x86-32  ----------===//
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
 //                        The Subzero Code Generator
@@ skipping 1741 matching lines @@
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (isByteSizedArithType(Ty)) {
     emitComplexI8(0, Operand(reg), imm);
     return;
   }
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitComplex(Ty, 0, Operand(reg), imm);
 }
 
+void AssemblerX8632::add(Type Ty, const Address &address, GPRRegister reg) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  if (Ty == IceType_i16)
+    emitOperandSizeOverride();
+  if (isByteSizedArithType(Ty))
+    emitUint8(0x00);
+  else
+    emitUint8(0x01);
+  emitOperand(reg, address);
+}
+
+void AssemblerX8632::add(Type Ty, const Address &address,
+                         const Immediate &imm) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  if (isByteSizedArithType(Ty)) {
+    emitComplexI8(0, address, imm);
+    return;
+  }
+  if (Ty == IceType_i16)
+    emitOperandSizeOverride();
+  emitComplex(Ty, 0, address, imm);
+}
+
 void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   if (isByteSizedArithType(Ty))
     emitUint8(0x12);
   else
     emitUint8(0x13);
   emitRegisterOperand(dst, src);
 }
@@ skipping 828 matching lines @@
   assert(shifter == RegX8632::Encoded_Reg_ecx);
   (void)shifter;
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
   emitOperand(rm, operand);
 }
 
 } // end of namespace X8632
 } // end of namespace Ice