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| 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. |
| 4 |
| 5 #ifndef V8_COMPILER_X87_INSTRUCTION_CODES_X87_H_ |
| 6 #define V8_COMPILER_X87_INSTRUCTION_CODES_X87_H_ |
| 7 |
| 8 #include "src/compiler/instruction.h" |
| 9 #include "src/compiler/instruction-codes.h" |
| 10 namespace v8 { |
| 11 namespace internal { |
| 12 namespace compiler { |
| 13 |
| 14 // X87-specific opcodes that specify which assembly sequence to emit. |
| 15 // Most opcodes specify a single instruction. |
| 16 #define TARGET_ARCH_OPCODE_LIST(V) \ |
| 17 V(X87Add) \ |
| 18 V(X87And) \ |
| 19 V(X87Cmp) \ |
| 20 V(X87Test) \ |
| 21 V(X87Or) \ |
| 22 V(X87Xor) \ |
| 23 V(X87Sub) \ |
| 24 V(X87Imul) \ |
| 25 V(X87ImulHigh) \ |
| 26 V(X87UmulHigh) \ |
| 27 V(X87Idiv) \ |
| 28 V(X87Udiv) \ |
| 29 V(X87Not) \ |
| 30 V(X87Neg) \ |
| 31 V(X87Shl) \ |
| 32 V(X87Shr) \ |
| 33 V(X87Sar) \ |
| 34 V(X87Ror) \ |
| 35 V(X87Lzcnt) \ |
| 36 V(X87Float32Cmp) \ |
| 37 V(X87Float32Add) \ |
| 38 V(X87Float32Sub) \ |
| 39 V(X87Float32Mul) \ |
| 40 V(X87Float32Div) \ |
| 41 V(X87Float32Max) \ |
| 42 V(X87Float32Min) \ |
| 43 V(X87Float32Abs) \ |
| 44 V(X87Float32Sqrt) \ |
| 45 V(X87LoadFloat64Constant) \ |
| 46 V(X87Float64Add) \ |
| 47 V(X87Float64Sub) \ |
| 48 V(X87Float64Mul) \ |
| 49 V(X87Float64Div) \ |
| 50 V(X87Float64Mod) \ |
| 51 V(X87Float64Max) \ |
| 52 V(X87Float64Min) \ |
| 53 V(X87Float64Abs) \ |
| 54 V(X87Int32ToFloat64) \ |
| 55 V(X87Float32ToFloat64) \ |
| 56 V(X87Uint32ToFloat64) \ |
| 57 V(X87Float64ToInt32) \ |
| 58 V(X87Float64ToFloat32) \ |
| 59 V(X87Float64ToUint32) \ |
| 60 V(X87Float64ExtractHighWord32) \ |
| 61 V(X87Float64ExtractLowWord32) \ |
| 62 V(X87Float64InsertHighWord32) \ |
| 63 V(X87Float64InsertLowWord32) \ |
| 64 V(X87Float64Sqrt) \ |
| 65 V(X87Float64Round) \ |
| 66 V(X87Float64Cmp) \ |
| 67 V(X87Movsxbl) \ |
| 68 V(X87Movzxbl) \ |
| 69 V(X87Movb) \ |
| 70 V(X87Movsxwl) \ |
| 71 V(X87Movzxwl) \ |
| 72 V(X87Movw) \ |
| 73 V(X87Movl) \ |
| 74 V(X87Movss) \ |
| 75 V(X87Movsd) \ |
| 76 V(X87Lea) \ |
| 77 V(X87Push) \ |
| 78 V(X87PushFloat64) \ |
| 79 V(X87PushFloat32) \ |
| 80 V(X87StoreWriteBarrier) \ |
| 81 V(X87StackCheck) |
| 82 |
| 83 |
| 84 // Addressing modes represent the "shape" of inputs to an instruction. |
| 85 // Many instructions support multiple addressing modes. Addressing modes |
| 86 // are encoded into the InstructionCode of the instruction and tell the |
| 87 // code generator after register allocation which assembler method to call. |
| 88 // |
| 89 // We use the following local notation for addressing modes: |
| 90 // |
| 91 // M = memory operand |
| 92 // R = base register |
| 93 // N = index register * N for N in {1, 2, 4, 8} |
| 94 // I = immediate displacement (int32_t) |
| 95 |
| 96 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
| 97 V(MR) /* [%r1 ] */ \ |
| 98 V(MRI) /* [%r1 + K] */ \ |
| 99 V(MR1) /* [%r1 + %r2*1 ] */ \ |
| 100 V(MR2) /* [%r1 + %r2*2 ] */ \ |
| 101 V(MR4) /* [%r1 + %r2*4 ] */ \ |
| 102 V(MR8) /* [%r1 + %r2*8 ] */ \ |
| 103 V(MR1I) /* [%r1 + %r2*1 + K] */ \ |
| 104 V(MR2I) /* [%r1 + %r2*2 + K] */ \ |
| 105 V(MR4I) /* [%r1 + %r2*3 + K] */ \ |
| 106 V(MR8I) /* [%r1 + %r2*4 + K] */ \ |
| 107 V(M1) /* [ %r2*1 ] */ \ |
| 108 V(M2) /* [ %r2*2 ] */ \ |
| 109 V(M4) /* [ %r2*4 ] */ \ |
| 110 V(M8) /* [ %r2*8 ] */ \ |
| 111 V(M1I) /* [ %r2*1 + K] */ \ |
| 112 V(M2I) /* [ %r2*2 + K] */ \ |
| 113 V(M4I) /* [ %r2*4 + K] */ \ |
| 114 V(M8I) /* [ %r2*8 + K] */ \ |
| 115 V(MI) /* [ K] */ |
| 116 |
| 117 } // namespace compiler |
| 118 } // namespace internal |
| 119 } // namespace v8 |
| 120 |
| 121 #endif // V8_COMPILER_X87_INSTRUCTION_CODES_X87_H_ |
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