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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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145 | 145 |
146 | 146 |
147 struct X87Register { | 147 struct X87Register { |
148 static const int kMaxNumAllocatableRegisters = 6; | 148 static const int kMaxNumAllocatableRegisters = 6; |
149 static const int kMaxNumRegisters = 8; | 149 static const int kMaxNumRegisters = 8; |
150 static int NumAllocatableRegisters() { | 150 static int NumAllocatableRegisters() { |
151 return kMaxNumAllocatableRegisters; | 151 return kMaxNumAllocatableRegisters; |
152 } | 152 } |
153 | 153 |
154 | 154 |
155 static int NumAllocatableRegistersForTurbo() { | |
Weiliang
2015/06/15 06:14:30
no use code, just delete it.
| |
156 return 1; | |
157 } | |
158 | |
159 static int NumAllocatableAliasedRegistersForTurbo() { | |
160 return NumAllocatableRegistersForTurbo(); | |
161 } | |
162 | |
155 // TODO(turbofan): Proper support for float32. | 163 // TODO(turbofan): Proper support for float32. |
156 static int NumAllocatableAliasedRegisters() { | 164 static int NumAllocatableAliasedRegisters() { |
157 return NumAllocatableRegisters(); | 165 return NumAllocatableRegisters(); |
158 } | 166 } |
159 | 167 |
160 | 168 |
161 static int ToAllocationIndex(X87Register reg) { | 169 static int ToAllocationIndex(X87Register reg) { |
162 return reg.code_; | 170 return reg.code_; |
163 } | 171 } |
164 | 172 |
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266 case greater_equal: | 274 case greater_equal: |
267 return less_equal; | 275 return less_equal; |
268 case less_equal: | 276 case less_equal: |
269 return greater_equal; | 277 return greater_equal; |
270 default: | 278 default: |
271 return cc; | 279 return cc; |
272 } | 280 } |
273 } | 281 } |
274 | 282 |
275 | 283 |
284 enum RoundingMode { | |
285 kRoundToNearest = 0x0, | |
286 kRoundDown = 0x1, | |
287 kRoundUp = 0x2, | |
288 kRoundToZero = 0x3 | |
289 }; | |
290 | |
291 | |
276 // ----------------------------------------------------------------------------- | 292 // ----------------------------------------------------------------------------- |
277 // Machine instruction Immediates | 293 // Machine instruction Immediates |
278 | 294 |
279 class Immediate BASE_EMBEDDED { | 295 class Immediate BASE_EMBEDDED { |
280 public: | 296 public: |
281 inline explicit Immediate(int x); | 297 inline explicit Immediate(int x); |
282 inline explicit Immediate(const ExternalReference& ext); | 298 inline explicit Immediate(const ExternalReference& ext); |
283 inline explicit Immediate(Handle<Object> handle); | 299 inline explicit Immediate(Handle<Object> handle); |
284 inline explicit Immediate(Smi* value); | 300 inline explicit Immediate(Smi* value); |
285 inline explicit Immediate(Address addr); | 301 inline explicit Immediate(Address addr); |
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613 void pop(const Operand& dst); | 629 void pop(const Operand& dst); |
614 | 630 |
615 void enter(const Immediate& size); | 631 void enter(const Immediate& size); |
616 void leave(); | 632 void leave(); |
617 | 633 |
618 // Moves | 634 // Moves |
619 void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); } | 635 void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); } |
620 void mov_b(Register dst, const Operand& src); | 636 void mov_b(Register dst, const Operand& src); |
621 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } | 637 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } |
622 void mov_b(const Operand& dst, int8_t imm8); | 638 void mov_b(const Operand& dst, int8_t imm8); |
639 void mov_b(const Operand& dst, const Immediate& src); | |
623 void mov_b(const Operand& dst, Register src); | 640 void mov_b(const Operand& dst, Register src); |
624 | 641 |
625 void mov_w(Register dst, const Operand& src); | 642 void mov_w(Register dst, const Operand& src); |
626 void mov_w(const Operand& dst, Register src); | 643 void mov_w(const Operand& dst, Register src); |
627 void mov_w(const Operand& dst, int16_t imm16); | 644 void mov_w(const Operand& dst, int16_t imm16); |
645 void mov_w(const Operand& dst, const Immediate& src); | |
646 | |
628 | 647 |
629 void mov(Register dst, int32_t imm32); | 648 void mov(Register dst, int32_t imm32); |
630 void mov(Register dst, const Immediate& x); | 649 void mov(Register dst, const Immediate& x); |
631 void mov(Register dst, Handle<Object> handle); | 650 void mov(Register dst, Handle<Object> handle); |
632 void mov(Register dst, const Operand& src); | 651 void mov(Register dst, const Operand& src); |
633 void mov(Register dst, Register src); | 652 void mov(Register dst, Register src); |
634 void mov(const Operand& dst, const Immediate& x); | 653 void mov(const Operand& dst, const Immediate& x); |
635 void mov(const Operand& dst, Handle<Object> handle); | 654 void mov(const Operand& dst, Handle<Object> handle); |
636 void mov(const Operand& dst, Register src); | 655 void mov(const Operand& dst, Register src); |
637 | 656 |
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879 void fyl2x(); | 898 void fyl2x(); |
880 void f2xm1(); | 899 void f2xm1(); |
881 void fscale(); | 900 void fscale(); |
882 void fninit(); | 901 void fninit(); |
883 | 902 |
884 void fadd(int i); | 903 void fadd(int i); |
885 void fadd_i(int i); | 904 void fadd_i(int i); |
886 void fadd_d(const Operand& adr); | 905 void fadd_d(const Operand& adr); |
887 void fsub(int i); | 906 void fsub(int i); |
888 void fsub_i(int i); | 907 void fsub_i(int i); |
908 void fsub_d(const Operand& adr); | |
909 void fsubr_d(const Operand& adr); | |
889 void fmul(int i); | 910 void fmul(int i); |
911 void fmul_d(const Operand& adr); | |
890 void fmul_i(int i); | 912 void fmul_i(int i); |
891 void fdiv(int i); | 913 void fdiv(int i); |
914 void fdiv_d(const Operand& adr); | |
915 void fdivr_d(const Operand& adr); | |
892 void fdiv_i(int i); | 916 void fdiv_i(int i); |
893 | 917 |
894 void fisub_s(const Operand& adr); | 918 void fisub_s(const Operand& adr); |
895 | 919 |
896 void faddp(int i = 1); | 920 void faddp(int i = 1); |
897 void fsubp(int i = 1); | 921 void fsubp(int i = 1); |
922 void fsubr(int i = 1); | |
898 void fsubrp(int i = 1); | 923 void fsubrp(int i = 1); |
899 void fmulp(int i = 1); | 924 void fmulp(int i = 1); |
900 void fdivp(int i = 1); | 925 void fdivp(int i = 1); |
901 void fprem(); | 926 void fprem(); |
902 void fprem1(); | 927 void fprem1(); |
903 | 928 |
904 void fxch(int i = 1); | 929 void fxch(int i = 1); |
905 void fincstp(); | 930 void fincstp(); |
906 void ffree(int i = 0); | 931 void ffree(int i = 0); |
907 | 932 |
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1083 private: | 1108 private: |
1084 Assembler* assembler_; | 1109 Assembler* assembler_; |
1085 #ifdef DEBUG | 1110 #ifdef DEBUG |
1086 int space_before_; | 1111 int space_before_; |
1087 #endif | 1112 #endif |
1088 }; | 1113 }; |
1089 | 1114 |
1090 } } // namespace v8::internal | 1115 } } // namespace v8::internal |
1091 | 1116 |
1092 #endif // V8_X87_ASSEMBLER_X87_H_ | 1117 #endif // V8_X87_ASSEMBLER_X87_H_ |
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