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Issue 1179733004: [arm64][turbofan]: Handle any immediate shift. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 624 matching lines...) Expand 10 before | Expand all | Expand 10 after
635 } 635 }
636 636
637 637
638 TEST_F(InstructionSelectorTest, AddShiftByImmediateOnLeft) { 638 TEST_F(InstructionSelectorTest, AddShiftByImmediateOnLeft) {
639 // 32-bit add. 639 // 32-bit add.
640 TRACED_FOREACH(Shift, shift, kShiftInstructions) { 640 TRACED_FOREACH(Shift, shift, kShiftInstructions) {
641 // Only test relevant shifted operands. 641 // Only test relevant shifted operands.
642 if (shift.mi.machine_type != kMachInt32) continue; 642 if (shift.mi.machine_type != kMachInt32) continue;
643 if (shift.mi.arch_opcode == kArm64Ror32) continue; 643 if (shift.mi.arch_opcode == kArm64Ror32) continue;
644 644
645 TRACED_FORRANGE(int, imm, 0, 31) { 645 // The available shift operand range is `0 <= imm < 32`, but we also test
646 // that immediates outside this range are handled properly (modulo-32).
647 TRACED_FORRANGE(int, imm, -32, 63) {
646 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32); 648 StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
647 m.Return((m.Int32Add)( 649 m.Return((m.Int32Add)(
648 (m.*shift.mi.constructor)(m.Parameter(1), m.Int32Constant(imm)), 650 (m.*shift.mi.constructor)(m.Parameter(1), m.Int32Constant(imm)),
649 m.Parameter(0))); 651 m.Parameter(0)));
650 Stream s = m.Build(); 652 Stream s = m.Build();
651 ASSERT_EQ(1U, s.size()); 653 ASSERT_EQ(1U, s.size());
652 EXPECT_EQ(kArm64Add32, s[0]->arch_opcode()); 654 EXPECT_EQ(kArm64Add32, s[0]->arch_opcode());
653 EXPECT_EQ(shift.mode, s[0]->addressing_mode()); 655 EXPECT_EQ(shift.mode, s[0]->addressing_mode());
654 EXPECT_EQ(3U, s[0]->InputCount()); 656 EXPECT_EQ(3U, s[0]->InputCount());
655 EXPECT_EQ(imm, s.ToInt64(s[0]->InputAt(2))); 657 EXPECT_EQ(imm, s.ToInt64(s[0]->InputAt(2)));
656 EXPECT_EQ(1U, s[0]->OutputCount()); 658 EXPECT_EQ(1U, s[0]->OutputCount());
657 } 659 }
658 } 660 }
659 661
660 // 64-bit add. 662 // 64-bit add.
661 TRACED_FOREACH(Shift, shift, kShiftInstructions) { 663 TRACED_FOREACH(Shift, shift, kShiftInstructions) {
662 // Only test relevant shifted operands. 664 // Only test relevant shifted operands.
663 if (shift.mi.machine_type != kMachInt64) continue; 665 if (shift.mi.machine_type != kMachInt64) continue;
664 if (shift.mi.arch_opcode == kArm64Ror) continue; 666 if (shift.mi.arch_opcode == kArm64Ror) continue;
665 667
666 TRACED_FORRANGE(int, imm, 0, 63) { 668 // The available shift operand range is `0 <= imm < 64`, but we also test
669 // that immediates outside this range are handled properly (modulo-64).
670 TRACED_FORRANGE(int, imm, -64, 127) {
667 StreamBuilder m(this, kMachInt64, kMachInt64, kMachInt64); 671 StreamBuilder m(this, kMachInt64, kMachInt64, kMachInt64);
668 m.Return((m.Int64Add)( 672 m.Return((m.Int64Add)(
669 (m.*shift.mi.constructor)(m.Parameter(1), m.Int64Constant(imm)), 673 (m.*shift.mi.constructor)(m.Parameter(1), m.Int64Constant(imm)),
670 m.Parameter(0))); 674 m.Parameter(0)));
671 Stream s = m.Build(); 675 Stream s = m.Build();
672 ASSERT_EQ(1U, s.size()); 676 ASSERT_EQ(1U, s.size());
673 EXPECT_EQ(kArm64Add, s[0]->arch_opcode()); 677 EXPECT_EQ(kArm64Add, s[0]->arch_opcode());
674 EXPECT_EQ(shift.mode, s[0]->addressing_mode()); 678 EXPECT_EQ(shift.mode, s[0]->addressing_mode());
675 EXPECT_EQ(3U, s[0]->InputCount()); 679 EXPECT_EQ(3U, s[0]->InputCount());
676 EXPECT_EQ(imm, s.ToInt64(s[0]->InputAt(2))); 680 EXPECT_EQ(imm, s.ToInt64(s[0]->InputAt(2)));
(...skipping 1518 matching lines...) Expand 10 before | Expand all | Expand 10 after
2195 Stream s = m.Build(); 2199 Stream s = m.Build();
2196 ASSERT_EQ(1U, s.size()); 2200 ASSERT_EQ(1U, s.size());
2197 EXPECT_EQ(kArm64Not, s[0]->arch_opcode()); 2201 EXPECT_EQ(kArm64Not, s[0]->arch_opcode());
2198 EXPECT_EQ(1U, s[0]->InputCount()); 2202 EXPECT_EQ(1U, s[0]->InputCount());
2199 EXPECT_EQ(1U, s[0]->OutputCount()); 2203 EXPECT_EQ(1U, s[0]->OutputCount());
2200 } 2204 }
2201 } 2205 }
2202 2206
2203 2207
2204 TEST_F(InstructionSelectorTest, Word32ShrWithWord32AndWithImmediate) { 2208 TEST_F(InstructionSelectorTest, Word32ShrWithWord32AndWithImmediate) {
2205 TRACED_FORRANGE(int32_t, lsb, 1, 31) { 2209 // The available shift operand range is `0 <= imm < 32`, but we also test
2210 // that immediates outside this range are handled properly (modulo-32).
2211 TRACED_FORRANGE(int32_t, shift, -32, 63) {
2212 int32_t lsb = shift & 0x1f;
2206 TRACED_FORRANGE(int32_t, width, 1, 32 - lsb) { 2213 TRACED_FORRANGE(int32_t, width, 1, 32 - lsb) {
2207 uint32_t jnk = rng()->NextInt(); 2214 uint32_t jnk = rng()->NextInt();
2208 jnk >>= 32 - lsb; 2215 jnk >>= 32 - lsb;
2209 uint32_t msk = ((0xffffffffu >> (32 - width)) << lsb) | jnk; 2216 uint32_t msk = ((0xffffffffu >> (32 - width)) << lsb) | jnk;
2210 StreamBuilder m(this, kMachInt32, kMachInt32); 2217 StreamBuilder m(this, kMachInt32, kMachInt32);
2211 m.Return(m.Word32Shr(m.Word32And(m.Parameter(0), m.Int32Constant(msk)), 2218 m.Return(m.Word32Shr(m.Word32And(m.Parameter(0), m.Int32Constant(msk)),
2212 m.Int32Constant(lsb))); 2219 m.Int32Constant(shift)));
2213 Stream s = m.Build(); 2220 Stream s = m.Build();
2214 ASSERT_EQ(1U, s.size()); 2221 ASSERT_EQ(1U, s.size());
2215 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode()); 2222 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode());
2216 ASSERT_EQ(3U, s[0]->InputCount()); 2223 ASSERT_EQ(3U, s[0]->InputCount());
2217 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1))); 2224 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
2218 EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2))); 2225 EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2)));
2219 } 2226 }
2220 } 2227 }
2221 TRACED_FORRANGE(int32_t, lsb, 1, 31) { 2228 TRACED_FORRANGE(int32_t, shift, -32, 63) {
2229 int32_t lsb = shift & 0x1f;
2222 TRACED_FORRANGE(int32_t, width, 1, 32 - lsb) { 2230 TRACED_FORRANGE(int32_t, width, 1, 32 - lsb) {
2223 uint32_t jnk = rng()->NextInt(); 2231 uint32_t jnk = rng()->NextInt();
2224 jnk >>= 32 - lsb; 2232 jnk >>= 32 - lsb;
2225 uint32_t msk = ((0xffffffffu >> (32 - width)) << lsb) | jnk; 2233 uint32_t msk = ((0xffffffffu >> (32 - width)) << lsb) | jnk;
2226 StreamBuilder m(this, kMachInt32, kMachInt32); 2234 StreamBuilder m(this, kMachInt32, kMachInt32);
2227 m.Return(m.Word32Shr(m.Word32And(m.Int32Constant(msk), m.Parameter(0)), 2235 m.Return(m.Word32Shr(m.Word32And(m.Int32Constant(msk), m.Parameter(0)),
2228 m.Int32Constant(lsb))); 2236 m.Int32Constant(shift)));
2229 Stream s = m.Build(); 2237 Stream s = m.Build();
2230 ASSERT_EQ(1U, s.size()); 2238 ASSERT_EQ(1U, s.size());
2231 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode()); 2239 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode());
2232 ASSERT_EQ(3U, s[0]->InputCount()); 2240 ASSERT_EQ(3U, s[0]->InputCount());
2233 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1))); 2241 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
2234 EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2))); 2242 EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2)));
2235 } 2243 }
2236 } 2244 }
2237 } 2245 }
2238 2246
2239 2247
2240 TEST_F(InstructionSelectorTest, Word64ShrWithWord64AndWithImmediate) { 2248 TEST_F(InstructionSelectorTest, Word64ShrWithWord64AndWithImmediate) {
2241 TRACED_FORRANGE(int32_t, lsb, 1, 63) { 2249 // The available shift operand range is `0 <= imm < 64`, but we also test
2250 // that immediates outside this range are handled properly (modulo-64).
2251 TRACED_FORRANGE(int32_t, shift, -64, 127) {
2252 int32_t lsb = shift & 0x3f;
2242 TRACED_FORRANGE(int32_t, width, 1, 64 - lsb) { 2253 TRACED_FORRANGE(int32_t, width, 1, 64 - lsb) {
2243 uint64_t jnk = rng()->NextInt64(); 2254 uint64_t jnk = rng()->NextInt64();
2244 jnk >>= 64 - lsb; 2255 jnk >>= 64 - lsb;
2245 uint64_t msk = 2256 uint64_t msk =
2246 ((V8_UINT64_C(0xffffffffffffffff) >> (64 - width)) << lsb) | jnk; 2257 ((V8_UINT64_C(0xffffffffffffffff) >> (64 - width)) << lsb) | jnk;
2247 StreamBuilder m(this, kMachInt64, kMachInt64); 2258 StreamBuilder m(this, kMachInt64, kMachInt64);
2248 m.Return(m.Word64Shr(m.Word64And(m.Parameter(0), m.Int64Constant(msk)), 2259 m.Return(m.Word64Shr(m.Word64And(m.Parameter(0), m.Int64Constant(msk)),
2249 m.Int64Constant(lsb))); 2260 m.Int64Constant(shift)));
2250 Stream s = m.Build(); 2261 Stream s = m.Build();
2251 ASSERT_EQ(1U, s.size()); 2262 ASSERT_EQ(1U, s.size());
2252 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode()); 2263 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode());
2253 ASSERT_EQ(3U, s[0]->InputCount()); 2264 ASSERT_EQ(3U, s[0]->InputCount());
2254 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1))); 2265 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
2255 EXPECT_EQ(width, s.ToInt64(s[0]->InputAt(2))); 2266 EXPECT_EQ(width, s.ToInt64(s[0]->InputAt(2)));
2256 } 2267 }
2257 } 2268 }
2258 TRACED_FORRANGE(int32_t, lsb, 1, 63) { 2269 TRACED_FORRANGE(int32_t, shift, -64, 127) {
2270 int32_t lsb = shift & 0x3f;
2259 TRACED_FORRANGE(int32_t, width, 1, 64 - lsb) { 2271 TRACED_FORRANGE(int32_t, width, 1, 64 - lsb) {
2260 uint64_t jnk = rng()->NextInt64(); 2272 uint64_t jnk = rng()->NextInt64();
2261 jnk >>= 64 - lsb; 2273 jnk >>= 64 - lsb;
2262 uint64_t msk = 2274 uint64_t msk =
2263 ((V8_UINT64_C(0xffffffffffffffff) >> (64 - width)) << lsb) | jnk; 2275 ((V8_UINT64_C(0xffffffffffffffff) >> (64 - width)) << lsb) | jnk;
2264 StreamBuilder m(this, kMachInt64, kMachInt64); 2276 StreamBuilder m(this, kMachInt64, kMachInt64);
2265 m.Return(m.Word64Shr(m.Word64And(m.Int64Constant(msk), m.Parameter(0)), 2277 m.Return(m.Word64Shr(m.Word64And(m.Int64Constant(msk), m.Parameter(0)),
2266 m.Int64Constant(lsb))); 2278 m.Int64Constant(shift)));
2267 Stream s = m.Build(); 2279 Stream s = m.Build();
2268 ASSERT_EQ(1U, s.size()); 2280 ASSERT_EQ(1U, s.size());
2269 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode()); 2281 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode());
2270 ASSERT_EQ(3U, s[0]->InputCount()); 2282 ASSERT_EQ(3U, s[0]->InputCount());
2271 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1))); 2283 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
2272 EXPECT_EQ(width, s.ToInt64(s[0]->InputAt(2))); 2284 EXPECT_EQ(width, s.ToInt64(s[0]->InputAt(2)));
2273 } 2285 }
2274 } 2286 }
2275 } 2287 }
2276 2288
2277 2289
2278 TEST_F(InstructionSelectorTest, Word32AndWithImmediateWithWord32Shr) { 2290 TEST_F(InstructionSelectorTest, Word32AndWithImmediateWithWord32Shr) {
2279 TRACED_FORRANGE(int32_t, lsb, 1, 31) { 2291 // The available shift operand range is `0 <= imm < 32`, but we also test
2292 // that immediates outside this range are handled properly (modulo-32).
2293 TRACED_FORRANGE(int32_t, shift, -32, 63) {
2294 int32_t lsb = shift & 0x1f;
2280 TRACED_FORRANGE(int32_t, width, 1, 31) { 2295 TRACED_FORRANGE(int32_t, width, 1, 31) {
2281 uint32_t msk = (1 << width) - 1; 2296 uint32_t msk = (1 << width) - 1;
2282 StreamBuilder m(this, kMachInt32, kMachInt32); 2297 StreamBuilder m(this, kMachInt32, kMachInt32);
2283 m.Return(m.Word32And(m.Word32Shr(m.Parameter(0), m.Int32Constant(lsb)), 2298 m.Return(m.Word32And(m.Word32Shr(m.Parameter(0), m.Int32Constant(shift)),
2284 m.Int32Constant(msk))); 2299 m.Int32Constant(msk)));
2285 Stream s = m.Build(); 2300 Stream s = m.Build();
2286 ASSERT_EQ(1U, s.size()); 2301 ASSERT_EQ(1U, s.size());
2287 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode()); 2302 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode());
2288 ASSERT_EQ(3U, s[0]->InputCount()); 2303 ASSERT_EQ(3U, s[0]->InputCount());
2289 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1))); 2304 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
2290 int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width; 2305 int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width;
2291 EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2))); 2306 EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2)));
2292 } 2307 }
2293 } 2308 }
2294 TRACED_FORRANGE(int32_t, lsb, 1, 31) { 2309 TRACED_FORRANGE(int32_t, shift, -32, 63) {
2310 int32_t lsb = shift & 0x1f;
2295 TRACED_FORRANGE(int32_t, width, 1, 31) { 2311 TRACED_FORRANGE(int32_t, width, 1, 31) {
2296 uint32_t msk = (1 << width) - 1; 2312 uint32_t msk = (1 << width) - 1;
2297 StreamBuilder m(this, kMachInt32, kMachInt32); 2313 StreamBuilder m(this, kMachInt32, kMachInt32);
2298 m.Return(m.Word32And(m.Int32Constant(msk), 2314 m.Return(
2299 m.Word32Shr(m.Parameter(0), m.Int32Constant(lsb)))); 2315 m.Word32And(m.Int32Constant(msk),
2316 m.Word32Shr(m.Parameter(0), m.Int32Constant(shift))));
2300 Stream s = m.Build(); 2317 Stream s = m.Build();
2301 ASSERT_EQ(1U, s.size()); 2318 ASSERT_EQ(1U, s.size());
2302 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode()); 2319 EXPECT_EQ(kArm64Ubfx32, s[0]->arch_opcode());
2303 ASSERT_EQ(3U, s[0]->InputCount()); 2320 ASSERT_EQ(3U, s[0]->InputCount());
2304 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1))); 2321 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
2305 int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width; 2322 int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width;
2306 EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2))); 2323 EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2)));
2307 } 2324 }
2308 } 2325 }
2309 } 2326 }
2310 2327
2311 2328
2312 TEST_F(InstructionSelectorTest, Word64AndWithImmediateWithWord64Shr) { 2329 TEST_F(InstructionSelectorTest, Word64AndWithImmediateWithWord64Shr) {
2313 TRACED_FORRANGE(int64_t, lsb, 1, 63) { 2330 // The available shift operand range is `0 <= imm < 64`, but we also test
2331 // that immediates outside this range are handled properly (modulo-64).
2332 TRACED_FORRANGE(int64_t, shift, -64, 127) {
2333 int64_t lsb = shift & 0x3f;
2314 TRACED_FORRANGE(int64_t, width, 1, 63) { 2334 TRACED_FORRANGE(int64_t, width, 1, 63) {
2315 uint64_t msk = (V8_UINT64_C(1) << width) - 1; 2335 uint64_t msk = (V8_UINT64_C(1) << width) - 1;
2316 StreamBuilder m(this, kMachInt64, kMachInt64); 2336 StreamBuilder m(this, kMachInt64, kMachInt64);
2317 m.Return(m.Word64And(m.Word64Shr(m.Parameter(0), m.Int64Constant(lsb)), 2337 m.Return(m.Word64And(m.Word64Shr(m.Parameter(0), m.Int64Constant(shift)),
2318 m.Int64Constant(msk))); 2338 m.Int64Constant(msk)));
2319 Stream s = m.Build(); 2339 Stream s = m.Build();
2320 ASSERT_EQ(1U, s.size()); 2340 ASSERT_EQ(1U, s.size());
2321 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode()); 2341 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode());
2322 ASSERT_EQ(3U, s[0]->InputCount()); 2342 ASSERT_EQ(3U, s[0]->InputCount());
2323 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1))); 2343 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
2324 int64_t actual_width = (lsb + width > 64) ? (64 - lsb) : width; 2344 int64_t actual_width = (lsb + width > 64) ? (64 - lsb) : width;
2325 EXPECT_EQ(actual_width, s.ToInt64(s[0]->InputAt(2))); 2345 EXPECT_EQ(actual_width, s.ToInt64(s[0]->InputAt(2)));
2326 } 2346 }
2327 } 2347 }
2328 TRACED_FORRANGE(int64_t, lsb, 1, 63) { 2348 TRACED_FORRANGE(int64_t, shift, -64, 127) {
2349 int64_t lsb = shift & 0x3f;
2329 TRACED_FORRANGE(int64_t, width, 1, 63) { 2350 TRACED_FORRANGE(int64_t, width, 1, 63) {
2330 uint64_t msk = (V8_UINT64_C(1) << width) - 1; 2351 uint64_t msk = (V8_UINT64_C(1) << width) - 1;
2331 StreamBuilder m(this, kMachInt64, kMachInt64); 2352 StreamBuilder m(this, kMachInt64, kMachInt64);
2332 m.Return(m.Word64And(m.Int64Constant(msk), 2353 m.Return(
2333 m.Word64Shr(m.Parameter(0), m.Int64Constant(lsb)))); 2354 m.Word64And(m.Int64Constant(msk),
2355 m.Word64Shr(m.Parameter(0), m.Int64Constant(shift))));
2334 Stream s = m.Build(); 2356 Stream s = m.Build();
2335 ASSERT_EQ(1U, s.size()); 2357 ASSERT_EQ(1U, s.size());
2336 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode()); 2358 EXPECT_EQ(kArm64Ubfx, s[0]->arch_opcode());
2337 ASSERT_EQ(3U, s[0]->InputCount()); 2359 ASSERT_EQ(3U, s[0]->InputCount());
2338 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1))); 2360 EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
2339 int64_t actual_width = (lsb + width > 64) ? (64 - lsb) : width; 2361 int64_t actual_width = (lsb + width > 64) ? (64 - lsb) : width;
2340 EXPECT_EQ(actual_width, s.ToInt64(s[0]->InputAt(2))); 2362 EXPECT_EQ(actual_width, s.ToInt64(s[0]->InputAt(2)));
2341 } 2363 }
2342 } 2364 }
2343 } 2365 }
(...skipping 174 matching lines...) Expand 10 before | Expand all | Expand 10 after
2518 EXPECT_EQ(kArm64Float64Neg, s[0]->arch_opcode()); 2540 EXPECT_EQ(kArm64Float64Neg, s[0]->arch_opcode());
2519 ASSERT_EQ(1U, s[0]->InputCount()); 2541 ASSERT_EQ(1U, s[0]->InputCount());
2520 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 2542 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
2521 ASSERT_EQ(1U, s[0]->OutputCount()); 2543 ASSERT_EQ(1U, s[0]->OutputCount());
2522 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 2544 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
2523 } 2545 }
2524 2546
2525 } // namespace compiler 2547 } // namespace compiler
2526 } // namespace internal 2548 } // namespace internal
2527 } // namespace v8 2549 } // namespace v8
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