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Issue 1179563004: Renames the assembler* files. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Changes the top comment for IceAssemblerX8632.cpp Created 5 years, 6 months ago
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1 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===//
2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
3 // for details. All rights reserved. Use of this source code is governed by a
4 // BSD-style license that can be found in the LICENSE file.
5 //
6 // Modified by the Subzero authors.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // The Subzero Code Generator
11 //
12 // This file is distributed under the University of Illinois Open Source
13 // License. See LICENSE.TXT for details.
14 //
15 //===----------------------------------------------------------------------===//
16 //
17 // This file implements the Assembler class for x86-32.
18 //
19 //===----------------------------------------------------------------------===//
20
21 #include "assembler_ia32.h"
22 #include "IceCfg.h"
23 #include "IceOperand.h"
24
25 namespace Ice {
26 namespace X8632 {
27
28 Address Address::ofConstPool(Assembler *Asm, const Constant *Imm) {
29 AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Imm);
30 const RelocOffsetT Offset = 0;
31 return Address::Absolute(Offset, Fixup);
32 }
33
34 AssemblerX8632::~AssemblerX8632() {
35 #ifndef NDEBUG
36 for (const Label *Label : CfgNodeLabels) {
37 Label->FinalCheck();
38 }
39 for (const Label *Label : LocalLabels) {
40 Label->FinalCheck();
41 }
42 #endif
43 }
44
45 void AssemblerX8632::alignFunction() {
46 SizeT Align = 1 << getBundleAlignLog2Bytes();
47 SizeT BytesNeeded = Utils::OffsetToAlignment(buffer_.GetPosition(), Align);
48 const SizeT HltSize = 1;
49 while (BytesNeeded > 0) {
50 hlt();
51 BytesNeeded -= HltSize;
52 }
53 }
54
55 Label *AssemblerX8632::GetOrCreateLabel(SizeT Number, LabelVector &Labels) {
56 Label *L = nullptr;
57 if (Number == Labels.size()) {
58 L = new (this->Allocate<Label>()) Label();
59 Labels.push_back(L);
60 return L;
61 }
62 if (Number > Labels.size()) {
63 Labels.resize(Number + 1);
64 }
65 L = Labels[Number];
66 if (!L) {
67 L = new (this->Allocate<Label>()) Label();
68 Labels[Number] = L;
69 }
70 return L;
71 }
72
73 Label *AssemblerX8632::GetOrCreateCfgNodeLabel(SizeT NodeNumber) {
74 return GetOrCreateLabel(NodeNumber, CfgNodeLabels);
75 }
76
77 Label *AssemblerX8632::GetOrCreateLocalLabel(SizeT Number) {
78 return GetOrCreateLabel(Number, LocalLabels);
79 }
80
81 void AssemblerX8632::BindCfgNodeLabel(SizeT NodeNumber) {
82 assert(!getPreliminary());
83 Label *L = GetOrCreateCfgNodeLabel(NodeNumber);
84 this->Bind(L);
85 }
86
87 void AssemblerX8632::BindLocalLabel(SizeT Number) {
88 Label *L = GetOrCreateLocalLabel(Number);
89 if (!getPreliminary())
90 this->Bind(L);
91 }
92
93 void AssemblerX8632::call(GPRRegister reg) {
94 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
95 EmitUint8(0xFF);
96 EmitRegisterOperand(2, reg);
97 }
98
99 void AssemblerX8632::call(const Address &address) {
100 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
101 EmitUint8(0xFF);
102 EmitOperand(2, address);
103 }
104
105 void AssemblerX8632::call(const ConstantRelocatable *label) {
106 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
107 intptr_t call_start = buffer_.GetPosition();
108 EmitUint8(0xE8);
109 EmitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
110 EmitInt32(-4);
111 assert((buffer_.GetPosition() - call_start) == kCallExternalLabelSize);
112 (void)call_start;
113 }
114
115 void AssemblerX8632::call(const Immediate &abs_address) {
116 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
117 intptr_t call_start = buffer_.GetPosition();
118 EmitUint8(0xE8);
119 EmitFixup(
120 this->createFixup(llvm::ELF::R_386_PC32, AssemblerFixup::NullSymbol));
121 EmitInt32(abs_address.value() - 4);
122 assert((buffer_.GetPosition() - call_start) == kCallExternalLabelSize);
123 (void)call_start;
124 }
125
126 void AssemblerX8632::pushl(GPRRegister reg) {
127 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
128 EmitUint8(0x50 + reg);
129 }
130
131 void AssemblerX8632::popl(GPRRegister reg) {
132 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
133 EmitUint8(0x58 + reg);
134 }
135
136 void AssemblerX8632::popl(const Address &address) {
137 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
138 EmitUint8(0x8F);
139 EmitOperand(0, address);
140 }
141
142 void AssemblerX8632::pushal() {
143 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
144 EmitUint8(0x60);
145 }
146
147 void AssemblerX8632::popal() {
148 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
149 EmitUint8(0x61);
150 }
151
152 void AssemblerX8632::setcc(CondX86::BrCond condition, ByteRegister dst) {
153 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
154 EmitUint8(0x0F);
155 EmitUint8(0x90 + condition);
156 EmitUint8(0xC0 + dst);
157 }
158
159 void AssemblerX8632::setcc(CondX86::BrCond condition, const Address &address) {
160 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
161 EmitUint8(0x0F);
162 EmitUint8(0x90 + condition);
163 EmitOperand(0, address);
164 }
165
166 void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
167 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
168 if (isByteSizedType(Ty)) {
169 EmitUint8(0xB0 + dst);
170 EmitUint8(imm.value() & 0xFF);
171 return;
172 }
173 if (Ty == IceType_i16)
174 EmitOperandSizeOverride();
175 EmitUint8(0xB8 + dst);
176 EmitImmediate(Ty, imm);
177 }
178
179 void AssemblerX8632::mov(Type Ty, GPRRegister dst, GPRRegister src) {
180 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
181 if (Ty == IceType_i16)
182 EmitOperandSizeOverride();
183 if (isByteSizedType(Ty)) {
184 EmitUint8(0x88);
185 } else {
186 EmitUint8(0x89);
187 }
188 EmitRegisterOperand(src, dst);
189 }
190
191 void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Address &src) {
192 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
193 if (Ty == IceType_i16)
194 EmitOperandSizeOverride();
195 if (isByteSizedType(Ty)) {
196 EmitUint8(0x8A);
197 } else {
198 EmitUint8(0x8B);
199 }
200 EmitOperand(dst, src);
201 }
202
203 void AssemblerX8632::mov(Type Ty, const Address &dst, GPRRegister src) {
204 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
205 if (Ty == IceType_i16)
206 EmitOperandSizeOverride();
207 if (isByteSizedType(Ty)) {
208 EmitUint8(0x88);
209 } else {
210 EmitUint8(0x89);
211 }
212 EmitOperand(src, dst);
213 }
214
215 void AssemblerX8632::mov(Type Ty, const Address &dst, const Immediate &imm) {
216 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
217 if (Ty == IceType_i16)
218 EmitOperandSizeOverride();
219 if (isByteSizedType(Ty)) {
220 EmitUint8(0xC6);
221 EmitOperand(0, dst);
222 EmitUint8(imm.value() & 0xFF);
223 } else {
224 EmitUint8(0xC7);
225 EmitOperand(0, dst);
226 EmitImmediate(Ty, imm);
227 }
228 }
229
230 void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, GPRRegister src) {
231 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
232 bool ByteSized = isByteSizedType(SrcTy);
233 assert(ByteSized || SrcTy == IceType_i16);
234 EmitUint8(0x0F);
235 EmitUint8(ByteSized ? 0xB6 : 0xB7);
236 EmitRegisterOperand(dst, src);
237 }
238
239 void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
240 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
241 bool ByteSized = isByteSizedType(SrcTy);
242 assert(ByteSized || SrcTy == IceType_i16);
243 EmitUint8(0x0F);
244 EmitUint8(ByteSized ? 0xB6 : 0xB7);
245 EmitOperand(dst, src);
246 }
247
248 void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, GPRRegister src) {
249 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
250 bool ByteSized = isByteSizedType(SrcTy);
251 assert(ByteSized || SrcTy == IceType_i16);
252 EmitUint8(0x0F);
253 EmitUint8(ByteSized ? 0xBE : 0xBF);
254 EmitRegisterOperand(dst, src);
255 }
256
257 void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
258 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
259 bool ByteSized = isByteSizedType(SrcTy);
260 assert(ByteSized || SrcTy == IceType_i16);
261 EmitUint8(0x0F);
262 EmitUint8(ByteSized ? 0xBE : 0xBF);
263 EmitOperand(dst, src);
264 }
265
266 void AssemblerX8632::lea(Type Ty, GPRRegister dst, const Address &src) {
267 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
268 assert(Ty == IceType_i16 || Ty == IceType_i32);
269 if (Ty == IceType_i16)
270 EmitOperandSizeOverride();
271 EmitUint8(0x8D);
272 EmitOperand(dst, src);
273 }
274
275 void AssemblerX8632::cmov(Type Ty, CondX86::BrCond cond, GPRRegister dst,
276 GPRRegister src) {
277 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
278 if (Ty == IceType_i16)
279 EmitOperandSizeOverride();
280 else
281 assert(Ty == IceType_i32);
282 EmitUint8(0x0F);
283 EmitUint8(0x40 + cond);
284 EmitRegisterOperand(dst, src);
285 }
286
287 void AssemblerX8632::cmov(Type Ty, CondX86::BrCond cond, GPRRegister dst,
288 const Address &src) {
289 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
290 if (Ty == IceType_i16)
291 EmitOperandSizeOverride();
292 else
293 assert(Ty == IceType_i32);
294 EmitUint8(0x0F);
295 EmitUint8(0x40 + cond);
296 EmitOperand(dst, src);
297 }
298
299 void AssemblerX8632::rep_movsb() {
300 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
301 EmitUint8(0xF3);
302 EmitUint8(0xA4);
303 }
304
305 void AssemblerX8632::movss(Type Ty, XmmRegister dst, const Address &src) {
306 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
307 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
308 EmitUint8(0x0F);
309 EmitUint8(0x10);
310 EmitOperand(dst, src);
311 }
312
313 void AssemblerX8632::movss(Type Ty, const Address &dst, XmmRegister src) {
314 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
315 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
316 EmitUint8(0x0F);
317 EmitUint8(0x11);
318 EmitOperand(src, dst);
319 }
320
321 void AssemblerX8632::movss(Type Ty, XmmRegister dst, XmmRegister src) {
322 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
323 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
324 EmitUint8(0x0F);
325 EmitUint8(0x11);
326 EmitXmmRegisterOperand(src, dst);
327 }
328
329 void AssemblerX8632::movd(XmmRegister dst, GPRRegister src) {
330 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
331 EmitUint8(0x66);
332 EmitUint8(0x0F);
333 EmitUint8(0x6E);
334 EmitRegisterOperand(dst, src);
335 }
336
337 void AssemblerX8632::movd(XmmRegister dst, const Address &src) {
338 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
339 EmitUint8(0x66);
340 EmitUint8(0x0F);
341 EmitUint8(0x6E);
342 EmitOperand(dst, src);
343 }
344
345 void AssemblerX8632::movd(GPRRegister dst, XmmRegister src) {
346 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
347 EmitUint8(0x66);
348 EmitUint8(0x0F);
349 EmitUint8(0x7E);
350 EmitRegisterOperand(src, dst);
351 }
352
353 void AssemblerX8632::movd(const Address &dst, XmmRegister src) {
354 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
355 EmitUint8(0x66);
356 EmitUint8(0x0F);
357 EmitUint8(0x7E);
358 EmitOperand(src, dst);
359 }
360
361 void AssemblerX8632::movq(XmmRegister dst, XmmRegister src) {
362 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
363 EmitUint8(0xF3);
364 EmitUint8(0x0F);
365 EmitUint8(0x7E);
366 EmitRegisterOperand(dst, src);
367 }
368
369 void AssemblerX8632::movq(const Address &dst, XmmRegister src) {
370 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
371 EmitUint8(0x66);
372 EmitUint8(0x0F);
373 EmitUint8(0xD6);
374 EmitOperand(src, dst);
375 }
376
377 void AssemblerX8632::movq(XmmRegister dst, const Address &src) {
378 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
379 EmitUint8(0xF3);
380 EmitUint8(0x0F);
381 EmitUint8(0x7E);
382 EmitOperand(dst, src);
383 }
384
385 void AssemblerX8632::addss(Type Ty, XmmRegister dst, XmmRegister src) {
386 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
387 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
388 EmitUint8(0x0F);
389 EmitUint8(0x58);
390 EmitXmmRegisterOperand(dst, src);
391 }
392
393 void AssemblerX8632::addss(Type Ty, XmmRegister dst, const Address &src) {
394 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
395 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
396 EmitUint8(0x0F);
397 EmitUint8(0x58);
398 EmitOperand(dst, src);
399 }
400
401 void AssemblerX8632::subss(Type Ty, XmmRegister dst, XmmRegister src) {
402 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
403 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
404 EmitUint8(0x0F);
405 EmitUint8(0x5C);
406 EmitXmmRegisterOperand(dst, src);
407 }
408
409 void AssemblerX8632::subss(Type Ty, XmmRegister dst, const Address &src) {
410 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
411 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
412 EmitUint8(0x0F);
413 EmitUint8(0x5C);
414 EmitOperand(dst, src);
415 }
416
417 void AssemblerX8632::mulss(Type Ty, XmmRegister dst, XmmRegister src) {
418 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
419 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
420 EmitUint8(0x0F);
421 EmitUint8(0x59);
422 EmitXmmRegisterOperand(dst, src);
423 }
424
425 void AssemblerX8632::mulss(Type Ty, XmmRegister dst, const Address &src) {
426 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
427 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
428 EmitUint8(0x0F);
429 EmitUint8(0x59);
430 EmitOperand(dst, src);
431 }
432
433 void AssemblerX8632::divss(Type Ty, XmmRegister dst, XmmRegister src) {
434 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
435 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
436 EmitUint8(0x0F);
437 EmitUint8(0x5E);
438 EmitXmmRegisterOperand(dst, src);
439 }
440
441 void AssemblerX8632::divss(Type Ty, XmmRegister dst, const Address &src) {
442 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
443 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
444 EmitUint8(0x0F);
445 EmitUint8(0x5E);
446 EmitOperand(dst, src);
447 }
448
449 void AssemblerX8632::fld(Type Ty, const Address &src) {
450 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
451 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
452 EmitOperand(0, src);
453 }
454
455 void AssemblerX8632::fstp(Type Ty, const Address &dst) {
456 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
457 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
458 EmitOperand(3, dst);
459 }
460
461 void AssemblerX8632::fstp(X87STRegister st) {
462 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
463 EmitUint8(0xDD);
464 EmitUint8(0xD8 + st);
465 }
466
467 void AssemblerX8632::movaps(XmmRegister dst, XmmRegister src) {
468 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
469 EmitUint8(0x0F);
470 EmitUint8(0x28);
471 EmitXmmRegisterOperand(dst, src);
472 }
473
474 void AssemblerX8632::movups(XmmRegister dst, XmmRegister src) {
475 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
476 EmitUint8(0x0F);
477 EmitUint8(0x10);
478 EmitRegisterOperand(dst, src);
479 }
480
481 void AssemblerX8632::movups(XmmRegister dst, const Address &src) {
482 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
483 EmitUint8(0x0F);
484 EmitUint8(0x10);
485 EmitOperand(dst, src);
486 }
487
488 void AssemblerX8632::movups(const Address &dst, XmmRegister src) {
489 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
490 EmitUint8(0x0F);
491 EmitUint8(0x11);
492 EmitOperand(src, dst);
493 }
494
495 void AssemblerX8632::padd(Type Ty, XmmRegister dst, XmmRegister src) {
496 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
497 EmitUint8(0x66);
498 EmitUint8(0x0F);
499 if (isByteSizedArithType(Ty)) {
500 EmitUint8(0xFC);
501 } else if (Ty == IceType_i16) {
502 EmitUint8(0xFD);
503 } else {
504 EmitUint8(0xFE);
505 }
506 EmitXmmRegisterOperand(dst, src);
507 }
508
509 void AssemblerX8632::padd(Type Ty, XmmRegister dst, const Address &src) {
510 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
511 EmitUint8(0x66);
512 EmitUint8(0x0F);
513 if (isByteSizedArithType(Ty)) {
514 EmitUint8(0xFC);
515 } else if (Ty == IceType_i16) {
516 EmitUint8(0xFD);
517 } else {
518 EmitUint8(0xFE);
519 }
520 EmitOperand(dst, src);
521 }
522
523 void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, XmmRegister src) {
524 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
525 EmitUint8(0x66);
526 EmitUint8(0x0F);
527 EmitUint8(0xDB);
528 EmitXmmRegisterOperand(dst, src);
529 }
530
531 void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
532 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
533 EmitUint8(0x66);
534 EmitUint8(0x0F);
535 EmitUint8(0xDB);
536 EmitOperand(dst, src);
537 }
538
539 void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, XmmRegister src) {
540 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
541 EmitUint8(0x66);
542 EmitUint8(0x0F);
543 EmitUint8(0xDF);
544 EmitXmmRegisterOperand(dst, src);
545 }
546
547 void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
548 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
549 EmitUint8(0x66);
550 EmitUint8(0x0F);
551 EmitUint8(0xDF);
552 EmitOperand(dst, src);
553 }
554
555 void AssemblerX8632::pmull(Type Ty, XmmRegister dst, XmmRegister src) {
556 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
557 EmitUint8(0x66);
558 EmitUint8(0x0F);
559 if (Ty == IceType_i16) {
560 EmitUint8(0xD5);
561 } else {
562 assert(Ty == IceType_i32);
563 EmitUint8(0x38);
564 EmitUint8(0x40);
565 }
566 EmitXmmRegisterOperand(dst, src);
567 }
568
569 void AssemblerX8632::pmull(Type Ty, XmmRegister dst, const Address &src) {
570 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
571 EmitUint8(0x66);
572 EmitUint8(0x0F);
573 if (Ty == IceType_i16) {
574 EmitUint8(0xD5);
575 } else {
576 assert(Ty == IceType_i32);
577 EmitUint8(0x38);
578 EmitUint8(0x40);
579 }
580 EmitOperand(dst, src);
581 }
582
583 void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst, XmmRegister src) {
584 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
585 EmitUint8(0x66);
586 EmitUint8(0x0F);
587 EmitUint8(0xF4);
588 EmitXmmRegisterOperand(dst, src);
589 }
590
591 void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst,
592 const Address &src) {
593 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
594 EmitUint8(0x66);
595 EmitUint8(0x0F);
596 EmitUint8(0xF4);
597 EmitOperand(dst, src);
598 }
599
600 void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, XmmRegister src) {
601 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
602 EmitUint8(0x66);
603 EmitUint8(0x0F);
604 EmitUint8(0xEB);
605 EmitXmmRegisterOperand(dst, src);
606 }
607
608 void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, const Address &src) {
609 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
610 EmitUint8(0x66);
611 EmitUint8(0x0F);
612 EmitUint8(0xEB);
613 EmitOperand(dst, src);
614 }
615
616 void AssemblerX8632::psub(Type Ty, XmmRegister dst, XmmRegister src) {
617 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
618 EmitUint8(0x66);
619 EmitUint8(0x0F);
620 if (isByteSizedArithType(Ty)) {
621 EmitUint8(0xF8);
622 } else if (Ty == IceType_i16) {
623 EmitUint8(0xF9);
624 } else {
625 EmitUint8(0xFA);
626 }
627 EmitXmmRegisterOperand(dst, src);
628 }
629
630 void AssemblerX8632::psub(Type Ty, XmmRegister dst, const Address &src) {
631 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
632 EmitUint8(0x66);
633 EmitUint8(0x0F);
634 if (isByteSizedArithType(Ty)) {
635 EmitUint8(0xF8);
636 } else if (Ty == IceType_i16) {
637 EmitUint8(0xF9);
638 } else {
639 EmitUint8(0xFA);
640 }
641 EmitOperand(dst, src);
642 }
643
644 void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, XmmRegister src) {
645 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
646 EmitUint8(0x66);
647 EmitUint8(0x0F);
648 EmitUint8(0xEF);
649 EmitXmmRegisterOperand(dst, src);
650 }
651
652 void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
653 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
654 EmitUint8(0x66);
655 EmitUint8(0x0F);
656 EmitUint8(0xEF);
657 EmitOperand(dst, src);
658 }
659
660 void AssemblerX8632::psll(Type Ty, XmmRegister dst, XmmRegister src) {
661 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
662 EmitUint8(0x66);
663 EmitUint8(0x0F);
664 if (Ty == IceType_i16) {
665 EmitUint8(0xF1);
666 } else {
667 assert(Ty == IceType_i32);
668 EmitUint8(0xF2);
669 }
670 EmitXmmRegisterOperand(dst, src);
671 }
672
673 void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Address &src) {
674 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
675 EmitUint8(0x66);
676 EmitUint8(0x0F);
677 if (Ty == IceType_i16) {
678 EmitUint8(0xF1);
679 } else {
680 assert(Ty == IceType_i32);
681 EmitUint8(0xF2);
682 }
683 EmitOperand(dst, src);
684 }
685
686 void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Immediate &imm) {
687 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
688 assert(imm.is_int8());
689 EmitUint8(0x66);
690 EmitUint8(0x0F);
691 if (Ty == IceType_i16) {
692 EmitUint8(0x71);
693 } else {
694 assert(Ty == IceType_i32);
695 EmitUint8(0x72);
696 }
697 EmitRegisterOperand(6, dst);
698 EmitUint8(imm.value() & 0xFF);
699 }
700
701 void AssemblerX8632::psra(Type Ty, XmmRegister dst, XmmRegister src) {
702 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
703 EmitUint8(0x66);
704 EmitUint8(0x0F);
705 if (Ty == IceType_i16) {
706 EmitUint8(0xE1);
707 } else {
708 assert(Ty == IceType_i32);
709 EmitUint8(0xE2);
710 }
711 EmitXmmRegisterOperand(dst, src);
712 }
713
714 void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Address &src) {
715 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
716 EmitUint8(0x66);
717 EmitUint8(0x0F);
718 if (Ty == IceType_i16) {
719 EmitUint8(0xE1);
720 } else {
721 assert(Ty == IceType_i32);
722 EmitUint8(0xE2);
723 }
724 EmitOperand(dst, src);
725 }
726
727 void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Immediate &imm) {
728 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
729 assert(imm.is_int8());
730 EmitUint8(0x66);
731 EmitUint8(0x0F);
732 if (Ty == IceType_i16) {
733 EmitUint8(0x71);
734 } else {
735 assert(Ty == IceType_i32);
736 EmitUint8(0x72);
737 }
738 EmitRegisterOperand(4, dst);
739 EmitUint8(imm.value() & 0xFF);
740 }
741
742 void AssemblerX8632::psrl(Type Ty, XmmRegister dst, XmmRegister src) {
743 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
744 EmitUint8(0x66);
745 EmitUint8(0x0F);
746 if (Ty == IceType_i16) {
747 EmitUint8(0xD1);
748 } else if (Ty == IceType_f64) {
749 EmitUint8(0xD3);
750 } else {
751 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
752 EmitUint8(0xD2);
753 }
754 EmitXmmRegisterOperand(dst, src);
755 }
756
757 void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Address &src) {
758 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
759 EmitUint8(0x66);
760 EmitUint8(0x0F);
761 if (Ty == IceType_i16) {
762 EmitUint8(0xD1);
763 } else if (Ty == IceType_f64) {
764 EmitUint8(0xD3);
765 } else {
766 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
767 EmitUint8(0xD2);
768 }
769 EmitOperand(dst, src);
770 }
771
772 void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Immediate &imm) {
773 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
774 assert(imm.is_int8());
775 EmitUint8(0x66);
776 EmitUint8(0x0F);
777 if (Ty == IceType_i16) {
778 EmitUint8(0x71);
779 } else if (Ty == IceType_f64) {
780 EmitUint8(0x73);
781 } else {
782 assert(Ty == IceType_i32 || Ty == IceType_f32 || Ty == IceType_v4f32);
783 EmitUint8(0x72);
784 }
785 EmitRegisterOperand(2, dst);
786 EmitUint8(imm.value() & 0xFF);
787 }
788
789 // {add,sub,mul,div}ps are given a Ty parameter for consistency with
790 // {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows
791 // addpd, etc., we can use the Ty parameter to decide on adding
792 // a 0x66 prefix.
793 void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
794 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
795 EmitUint8(0x0F);
796 EmitUint8(0x58);
797 EmitXmmRegisterOperand(dst, src);
798 }
799
800 void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
801 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
802 EmitUint8(0x0F);
803 EmitUint8(0x58);
804 EmitOperand(dst, src);
805 }
806
807 void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
808 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
809 EmitUint8(0x0F);
810 EmitUint8(0x5C);
811 EmitXmmRegisterOperand(dst, src);
812 }
813
814 void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
815 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
816 EmitUint8(0x0F);
817 EmitUint8(0x5C);
818 EmitOperand(dst, src);
819 }
820
821 void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
822 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
823 EmitUint8(0x0F);
824 EmitUint8(0x5E);
825 EmitXmmRegisterOperand(dst, src);
826 }
827
828 void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
829 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
830 EmitUint8(0x0F);
831 EmitUint8(0x5E);
832 EmitOperand(dst, src);
833 }
834
835 void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
836 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
837 EmitUint8(0x0F);
838 EmitUint8(0x59);
839 EmitXmmRegisterOperand(dst, src);
840 }
841
842 void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
843 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
844 EmitUint8(0x0F);
845 EmitUint8(0x59);
846 EmitOperand(dst, src);
847 }
848
849 void AssemblerX8632::minps(XmmRegister dst, XmmRegister src) {
850 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
851 EmitUint8(0x0F);
852 EmitUint8(0x5D);
853 EmitXmmRegisterOperand(dst, src);
854 }
855
856 void AssemblerX8632::maxps(XmmRegister dst, XmmRegister src) {
857 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
858 EmitUint8(0x0F);
859 EmitUint8(0x5F);
860 EmitXmmRegisterOperand(dst, src);
861 }
862
863 void AssemblerX8632::andps(XmmRegister dst, XmmRegister src) {
864 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
865 EmitUint8(0x0F);
866 EmitUint8(0x54);
867 EmitXmmRegisterOperand(dst, src);
868 }
869
870 void AssemblerX8632::andps(XmmRegister dst, const Address &src) {
871 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
872 EmitUint8(0x0F);
873 EmitUint8(0x54);
874 EmitOperand(dst, src);
875 }
876
877 void AssemblerX8632::orps(XmmRegister dst, XmmRegister src) {
878 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
879 EmitUint8(0x0F);
880 EmitUint8(0x56);
881 EmitXmmRegisterOperand(dst, src);
882 }
883
884 void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
885 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
886 EmitUint8(0x66);
887 EmitUint8(0x0F);
888 EmitUint8(0x38);
889 EmitUint8(0x14);
890 EmitXmmRegisterOperand(dst, src);
891 }
892
893 void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst,
894 const Address &src) {
895 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
896 EmitUint8(0x66);
897 EmitUint8(0x0F);
898 EmitUint8(0x38);
899 EmitUint8(0x14);
900 EmitOperand(dst, src);
901 }
902
903 void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
904 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
905 EmitUint8(0x66);
906 EmitUint8(0x0F);
907 EmitUint8(0x38);
908 EmitUint8(0x10);
909 EmitXmmRegisterOperand(dst, src);
910 }
911
912 void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst,
913 const Address &src) {
914 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
915 EmitUint8(0x66);
916 EmitUint8(0x0F);
917 EmitUint8(0x38);
918 EmitUint8(0x10);
919 EmitOperand(dst, src);
920 }
921
922 void AssemblerX8632::cmpps(XmmRegister dst, XmmRegister src,
923 CondX86::CmppsCond CmpCondition) {
924 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
925 EmitUint8(0x0F);
926 EmitUint8(0xC2);
927 EmitXmmRegisterOperand(dst, src);
928 EmitUint8(CmpCondition);
929 }
930
931 void AssemblerX8632::cmpps(XmmRegister dst, const Address &src,
932 CondX86::CmppsCond CmpCondition) {
933 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
934 EmitUint8(0x0F);
935 EmitUint8(0xC2);
936 EmitOperand(dst, src);
937 EmitUint8(CmpCondition);
938 }
939
940 void AssemblerX8632::sqrtps(XmmRegister dst) {
941 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
942 EmitUint8(0x0F);
943 EmitUint8(0x51);
944 EmitXmmRegisterOperand(dst, dst);
945 }
946
947 void AssemblerX8632::rsqrtps(XmmRegister dst) {
948 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
949 EmitUint8(0x0F);
950 EmitUint8(0x52);
951 EmitXmmRegisterOperand(dst, dst);
952 }
953
954 void AssemblerX8632::reciprocalps(XmmRegister dst) {
955 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
956 EmitUint8(0x0F);
957 EmitUint8(0x53);
958 EmitXmmRegisterOperand(dst, dst);
959 }
960
961 void AssemblerX8632::movhlps(XmmRegister dst, XmmRegister src) {
962 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
963 EmitUint8(0x0F);
964 EmitUint8(0x12);
965 EmitXmmRegisterOperand(dst, src);
966 }
967
968 void AssemblerX8632::movlhps(XmmRegister dst, XmmRegister src) {
969 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
970 EmitUint8(0x0F);
971 EmitUint8(0x16);
972 EmitXmmRegisterOperand(dst, src);
973 }
974
975 void AssemblerX8632::unpcklps(XmmRegister dst, XmmRegister src) {
976 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
977 EmitUint8(0x0F);
978 EmitUint8(0x14);
979 EmitXmmRegisterOperand(dst, src);
980 }
981
982 void AssemblerX8632::unpckhps(XmmRegister dst, XmmRegister src) {
983 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
984 EmitUint8(0x0F);
985 EmitUint8(0x15);
986 EmitXmmRegisterOperand(dst, src);
987 }
988
989 void AssemblerX8632::unpcklpd(XmmRegister dst, XmmRegister src) {
990 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
991 EmitUint8(0x66);
992 EmitUint8(0x0F);
993 EmitUint8(0x14);
994 EmitXmmRegisterOperand(dst, src);
995 }
996
997 void AssemblerX8632::unpckhpd(XmmRegister dst, XmmRegister src) {
998 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
999 EmitUint8(0x66);
1000 EmitUint8(0x0F);
1001 EmitUint8(0x15);
1002 EmitXmmRegisterOperand(dst, src);
1003 }
1004
1005 void AssemblerX8632::set1ps(XmmRegister dst, GPRRegister tmp1,
1006 const Immediate &imm) {
1007 // Load 32-bit immediate value into tmp1.
1008 mov(IceType_i32, tmp1, imm);
1009 // Move value from tmp1 into dst.
1010 movd(dst, tmp1);
1011 // Broadcast low lane into other three lanes.
1012 shufps(dst, dst, Immediate(0x0));
1013 }
1014
1015 void AssemblerX8632::shufps(XmmRegister dst, XmmRegister src,
1016 const Immediate &imm) {
1017 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1018 EmitUint8(0x0F);
1019 EmitUint8(0xC6);
1020 EmitXmmRegisterOperand(dst, src);
1021 assert(imm.is_uint8());
1022 EmitUint8(imm.value());
1023 }
1024
1025 void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, XmmRegister src,
1026 const Immediate &imm) {
1027 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1028 EmitUint8(0x66);
1029 EmitUint8(0x0F);
1030 EmitUint8(0x70);
1031 EmitXmmRegisterOperand(dst, src);
1032 assert(imm.is_uint8());
1033 EmitUint8(imm.value());
1034 }
1035
1036 void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
1037 const Immediate &imm) {
1038 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1039 EmitUint8(0x66);
1040 EmitUint8(0x0F);
1041 EmitUint8(0x70);
1042 EmitOperand(dst, src);
1043 assert(imm.is_uint8());
1044 EmitUint8(imm.value());
1045 }
1046
1047 void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, XmmRegister src,
1048 const Immediate &imm) {
1049 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1050 EmitUint8(0x0F);
1051 EmitUint8(0xC6);
1052 EmitXmmRegisterOperand(dst, src);
1053 assert(imm.is_uint8());
1054 EmitUint8(imm.value());
1055 }
1056
1057 void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
1058 const Immediate &imm) {
1059 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1060 EmitUint8(0x0F);
1061 EmitUint8(0xC6);
1062 EmitOperand(dst, src);
1063 assert(imm.is_uint8());
1064 EmitUint8(imm.value());
1065 }
1066
1067 void AssemblerX8632::minpd(XmmRegister dst, XmmRegister src) {
1068 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1069 EmitUint8(0x66);
1070 EmitUint8(0x0F);
1071 EmitUint8(0x5D);
1072 EmitXmmRegisterOperand(dst, src);
1073 }
1074
1075 void AssemblerX8632::maxpd(XmmRegister dst, XmmRegister src) {
1076 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1077 EmitUint8(0x66);
1078 EmitUint8(0x0F);
1079 EmitUint8(0x5F);
1080 EmitXmmRegisterOperand(dst, src);
1081 }
1082
1083 void AssemblerX8632::sqrtpd(XmmRegister dst) {
1084 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1085 EmitUint8(0x66);
1086 EmitUint8(0x0F);
1087 EmitUint8(0x51);
1088 EmitXmmRegisterOperand(dst, dst);
1089 }
1090
1091 void AssemblerX8632::shufpd(XmmRegister dst, XmmRegister src,
1092 const Immediate &imm) {
1093 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1094 EmitUint8(0x66);
1095 EmitUint8(0x0F);
1096 EmitUint8(0xC6);
1097 EmitXmmRegisterOperand(dst, src);
1098 assert(imm.is_uint8());
1099 EmitUint8(imm.value());
1100 }
1101
1102 void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
1103 XmmRegister src) {
1104 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1105 EmitUint8(0x0F);
1106 EmitUint8(0x5B);
1107 EmitXmmRegisterOperand(dst, src);
1108 }
1109
1110 void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
1111 const Address &src) {
1112 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1113 EmitUint8(0x0F);
1114 EmitUint8(0x5B);
1115 EmitOperand(dst, src);
1116 }
1117
1118 void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
1119 XmmRegister src) {
1120 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1121 EmitUint8(0xF3);
1122 EmitUint8(0x0F);
1123 EmitUint8(0x5B);
1124 EmitXmmRegisterOperand(dst, src);
1125 }
1126
1127 void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
1128 const Address &src) {
1129 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1130 EmitUint8(0xF3);
1131 EmitUint8(0x0F);
1132 EmitUint8(0x5B);
1133 EmitOperand(dst, src);
1134 }
1135
1136 void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst, GPRRegister src) {
1137 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1138 EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
1139 EmitUint8(0x0F);
1140 EmitUint8(0x2A);
1141 EmitRegisterOperand(dst, src);
1142 }
1143
1144 void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst,
1145 const Address &src) {
1146 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1147 EmitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
1148 EmitUint8(0x0F);
1149 EmitUint8(0x2A);
1150 EmitOperand(dst, src);
1151 }
1152
1153 void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
1154 XmmRegister src) {
1155 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1156 // ss2sd or sd2ss
1157 EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1158 EmitUint8(0x0F);
1159 EmitUint8(0x5A);
1160 EmitXmmRegisterOperand(dst, src);
1161 }
1162
1163 void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
1164 const Address &src) {
1165 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1166 EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1167 EmitUint8(0x0F);
1168 EmitUint8(0x5A);
1169 EmitOperand(dst, src);
1170 }
1171
1172 void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst, XmmRegister src) {
1173 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1174 EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1175 EmitUint8(0x0F);
1176 EmitUint8(0x2C);
1177 EmitXmmRegisterOperand(dst, src);
1178 }
1179
1180 void AssemblerX8632::cvttss2si(Type SrcTy, GPRRegister dst,
1181 const Address &src) {
1182 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1183 EmitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
1184 EmitUint8(0x0F);
1185 EmitUint8(0x2C);
1186 EmitOperand(dst, src);
1187 }
1188
1189 void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, XmmRegister b) {
1190 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1191 if (Ty == IceType_f64)
1192 EmitUint8(0x66);
1193 EmitUint8(0x0F);
1194 EmitUint8(0x2E);
1195 EmitXmmRegisterOperand(a, b);
1196 }
1197
1198 void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, const Address &b) {
1199 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1200 if (Ty == IceType_f64)
1201 EmitUint8(0x66);
1202 EmitUint8(0x0F);
1203 EmitUint8(0x2E);
1204 EmitOperand(a, b);
1205 }
1206
1207 void AssemblerX8632::movmskpd(GPRRegister dst, XmmRegister src) {
1208 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1209 EmitUint8(0x66);
1210 EmitUint8(0x0F);
1211 EmitUint8(0x50);
1212 EmitXmmRegisterOperand(dst, src);
1213 }
1214
1215 void AssemblerX8632::movmskps(GPRRegister dst, XmmRegister src) {
1216 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1217 EmitUint8(0x0F);
1218 EmitUint8(0x50);
1219 EmitXmmRegisterOperand(dst, src);
1220 }
1221
1222 void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, const Address &src) {
1223 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1224 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1225 EmitUint8(0x0F);
1226 EmitUint8(0x51);
1227 EmitOperand(dst, src);
1228 }
1229
1230 void AssemblerX8632::sqrtss(Type Ty, XmmRegister dst, XmmRegister src) {
1231 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1232 EmitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1233 EmitUint8(0x0F);
1234 EmitUint8(0x51);
1235 EmitXmmRegisterOperand(dst, src);
1236 }
1237
1238 void AssemblerX8632::xorpd(XmmRegister dst, const Address &src) {
1239 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1240 EmitUint8(0x66);
1241 EmitUint8(0x0F);
1242 EmitUint8(0x57);
1243 EmitOperand(dst, src);
1244 }
1245
1246 void AssemblerX8632::xorpd(XmmRegister dst, XmmRegister src) {
1247 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1248 EmitUint8(0x66);
1249 EmitUint8(0x0F);
1250 EmitUint8(0x57);
1251 EmitXmmRegisterOperand(dst, src);
1252 }
1253
1254 void AssemblerX8632::orpd(XmmRegister dst, XmmRegister src) {
1255 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1256 EmitUint8(0x66);
1257 EmitUint8(0x0F);
1258 EmitUint8(0x56);
1259 EmitXmmRegisterOperand(dst, src);
1260 }
1261
1262 void AssemblerX8632::xorps(XmmRegister dst, const Address &src) {
1263 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1264 EmitUint8(0x0F);
1265 EmitUint8(0x57);
1266 EmitOperand(dst, src);
1267 }
1268
1269 void AssemblerX8632::xorps(XmmRegister dst, XmmRegister src) {
1270 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1271 EmitUint8(0x0F);
1272 EmitUint8(0x57);
1273 EmitXmmRegisterOperand(dst, src);
1274 }
1275
1276 void AssemblerX8632::andpd(XmmRegister dst, const Address &src) {
1277 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1278 EmitUint8(0x66);
1279 EmitUint8(0x0F);
1280 EmitUint8(0x54);
1281 EmitOperand(dst, src);
1282 }
1283
1284 void AssemblerX8632::andpd(XmmRegister dst, XmmRegister src) {
1285 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1286 EmitUint8(0x66);
1287 EmitUint8(0x0F);
1288 EmitUint8(0x54);
1289 EmitXmmRegisterOperand(dst, src);
1290 }
1291
1292 void AssemblerX8632::insertps(Type Ty, XmmRegister dst, XmmRegister src,
1293 const Immediate &imm) {
1294 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1295 assert(imm.is_uint8());
1296 assert(isVectorFloatingType(Ty));
1297 (void)Ty;
1298 EmitUint8(0x66);
1299 EmitUint8(0x0F);
1300 EmitUint8(0x3A);
1301 EmitUint8(0x21);
1302 EmitXmmRegisterOperand(dst, src);
1303 EmitUint8(imm.value());
1304 }
1305
1306 void AssemblerX8632::insertps(Type Ty, XmmRegister dst, const Address &src,
1307 const Immediate &imm) {
1308 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1309 assert(imm.is_uint8());
1310 assert(isVectorFloatingType(Ty));
1311 (void)Ty;
1312 EmitUint8(0x66);
1313 EmitUint8(0x0F);
1314 EmitUint8(0x3A);
1315 EmitUint8(0x21);
1316 EmitOperand(dst, src);
1317 EmitUint8(imm.value());
1318 }
1319
1320 void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, GPRRegister src,
1321 const Immediate &imm) {
1322 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1323 assert(imm.is_uint8());
1324 if (Ty == IceType_i16) {
1325 EmitUint8(0x66);
1326 EmitUint8(0x0F);
1327 EmitUint8(0xC4);
1328 EmitXmmRegisterOperand(dst, XmmRegister(src));
1329 EmitUint8(imm.value());
1330 } else {
1331 EmitUint8(0x66);
1332 EmitUint8(0x0F);
1333 EmitUint8(0x3A);
1334 EmitUint8(isByteSizedType(Ty) ? 0x20 : 0x22);
1335 EmitXmmRegisterOperand(dst, XmmRegister(src));
1336 EmitUint8(imm.value());
1337 }
1338 }
1339
1340 void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, const Address &src,
1341 const Immediate &imm) {
1342 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1343 assert(imm.is_uint8());
1344 if (Ty == IceType_i16) {
1345 EmitUint8(0x66);
1346 EmitUint8(0x0F);
1347 EmitUint8(0xC4);
1348 EmitOperand(dst, src);
1349 EmitUint8(imm.value());
1350 } else {
1351 EmitUint8(0x66);
1352 EmitUint8(0x0F);
1353 EmitUint8(0x3A);
1354 EmitUint8(isByteSizedType(Ty) ? 0x20 : 0x22);
1355 EmitOperand(dst, src);
1356 EmitUint8(imm.value());
1357 }
1358 }
1359
1360 void AssemblerX8632::pextr(Type Ty, GPRRegister dst, XmmRegister src,
1361 const Immediate &imm) {
1362 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1363 assert(imm.is_uint8());
1364 if (Ty == IceType_i16) {
1365 EmitUint8(0x66);
1366 EmitUint8(0x0F);
1367 EmitUint8(0xC5);
1368 EmitXmmRegisterOperand(XmmRegister(dst), src);
1369 EmitUint8(imm.value());
1370 } else {
1371 EmitUint8(0x66);
1372 EmitUint8(0x0F);
1373 EmitUint8(0x3A);
1374 EmitUint8(isByteSizedType(Ty) ? 0x14 : 0x16);
1375 // SSE 4.1 versions are "MRI" because dst can be mem, while
1376 // pextrw (SSE2) is RMI because dst must be reg.
1377 EmitXmmRegisterOperand(src, XmmRegister(dst));
1378 EmitUint8(imm.value());
1379 }
1380 }
1381
1382 void AssemblerX8632::pmovsxdq(XmmRegister dst, XmmRegister src) {
1383 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1384 EmitUint8(0x66);
1385 EmitUint8(0x0F);
1386 EmitUint8(0x38);
1387 EmitUint8(0x25);
1388 EmitXmmRegisterOperand(dst, src);
1389 }
1390
1391 void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, XmmRegister src) {
1392 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1393 EmitUint8(0x66);
1394 EmitUint8(0x0F);
1395 if (isByteSizedArithType(Ty)) {
1396 EmitUint8(0x74);
1397 } else if (Ty == IceType_i16) {
1398 EmitUint8(0x75);
1399 } else {
1400 EmitUint8(0x76);
1401 }
1402 EmitXmmRegisterOperand(dst, src);
1403 }
1404
1405 void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
1406 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1407 EmitUint8(0x66);
1408 EmitUint8(0x0F);
1409 if (isByteSizedArithType(Ty)) {
1410 EmitUint8(0x74);
1411 } else if (Ty == IceType_i16) {
1412 EmitUint8(0x75);
1413 } else {
1414 EmitUint8(0x76);
1415 }
1416 EmitOperand(dst, src);
1417 }
1418
1419 void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, XmmRegister src) {
1420 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1421 EmitUint8(0x66);
1422 EmitUint8(0x0F);
1423 if (isByteSizedArithType(Ty)) {
1424 EmitUint8(0x64);
1425 } else if (Ty == IceType_i16) {
1426 EmitUint8(0x65);
1427 } else {
1428 EmitUint8(0x66);
1429 }
1430 EmitXmmRegisterOperand(dst, src);
1431 }
1432
1433 void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
1434 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1435 EmitUint8(0x66);
1436 EmitUint8(0x0F);
1437 if (isByteSizedArithType(Ty)) {
1438 EmitUint8(0x64);
1439 } else if (Ty == IceType_i16) {
1440 EmitUint8(0x65);
1441 } else {
1442 EmitUint8(0x66);
1443 }
1444 EmitOperand(dst, src);
1445 }
1446
1447 void AssemblerX8632::roundsd(XmmRegister dst, XmmRegister src,
1448 RoundingMode mode) {
1449 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1450 EmitUint8(0x66);
1451 EmitUint8(0x0F);
1452 EmitUint8(0x3A);
1453 EmitUint8(0x0B);
1454 EmitXmmRegisterOperand(dst, src);
1455 // Mask precision exeption.
1456 EmitUint8(static_cast<uint8_t>(mode) | 0x8);
1457 }
1458
1459 void AssemblerX8632::fnstcw(const Address &dst) {
1460 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1461 EmitUint8(0xD9);
1462 EmitOperand(7, dst);
1463 }
1464
1465 void AssemblerX8632::fldcw(const Address &src) {
1466 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1467 EmitUint8(0xD9);
1468 EmitOperand(5, src);
1469 }
1470
1471 void AssemblerX8632::fistpl(const Address &dst) {
1472 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1473 EmitUint8(0xDF);
1474 EmitOperand(7, dst);
1475 }
1476
1477 void AssemblerX8632::fistps(const Address &dst) {
1478 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1479 EmitUint8(0xDB);
1480 EmitOperand(3, dst);
1481 }
1482
1483 void AssemblerX8632::fildl(const Address &src) {
1484 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1485 EmitUint8(0xDF);
1486 EmitOperand(5, src);
1487 }
1488
1489 void AssemblerX8632::filds(const Address &src) {
1490 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1491 EmitUint8(0xDB);
1492 EmitOperand(0, src);
1493 }
1494
1495 void AssemblerX8632::fincstp() {
1496 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1497 EmitUint8(0xD9);
1498 EmitUint8(0xF7);
1499 }
1500
1501 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Immediate &imm) {
1502 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1503 if (isByteSizedType(Ty)) {
1504 EmitComplexI8(7, Operand(reg), imm);
1505 return;
1506 }
1507 if (Ty == IceType_i16)
1508 EmitOperandSizeOverride();
1509 EmitComplex(Ty, 7, Operand(reg), imm);
1510 }
1511
1512 void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) {
1513 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1514 if (Ty == IceType_i16)
1515 EmitOperandSizeOverride();
1516 if (isByteSizedType(Ty))
1517 EmitUint8(0x3A);
1518 else
1519 EmitUint8(0x3B);
1520 EmitRegisterOperand(reg0, reg1);
1521 }
1522
1523 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) {
1524 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1525 if (Ty == IceType_i16)
1526 EmitOperandSizeOverride();
1527 if (isByteSizedType(Ty))
1528 EmitUint8(0x3A);
1529 else
1530 EmitUint8(0x3B);
1531 EmitOperand(reg, address);
1532 }
1533
1534 void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) {
1535 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1536 if (Ty == IceType_i16)
1537 EmitOperandSizeOverride();
1538 if (isByteSizedType(Ty))
1539 EmitUint8(0x38);
1540 else
1541 EmitUint8(0x39);
1542 EmitOperand(reg, address);
1543 }
1544
1545 void AssemblerX8632::cmp(Type Ty, const Address &address,
1546 const Immediate &imm) {
1547 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1548 if (isByteSizedType(Ty)) {
1549 EmitComplexI8(7, address, imm);
1550 return;
1551 }
1552 if (Ty == IceType_i16)
1553 EmitOperandSizeOverride();
1554 EmitComplex(Ty, 7, address, imm);
1555 }
1556
1557 void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) {
1558 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1559 if (Ty == IceType_i16)
1560 EmitOperandSizeOverride();
1561 if (isByteSizedType(Ty))
1562 EmitUint8(0x84);
1563 else
1564 EmitUint8(0x85);
1565 EmitRegisterOperand(reg1, reg2);
1566 }
1567
1568 void AssemblerX8632::test(Type Ty, const Address &addr, GPRRegister reg) {
1569 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1570 if (Ty == IceType_i16)
1571 EmitOperandSizeOverride();
1572 if (isByteSizedType(Ty))
1573 EmitUint8(0x84);
1574 else
1575 EmitUint8(0x85);
1576 EmitOperand(reg, addr);
1577 }
1578
1579 void AssemblerX8632::test(Type Ty, GPRRegister reg,
1580 const Immediate &immediate) {
1581 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1582 // For registers that have a byte variant (EAX, EBX, ECX, and EDX)
1583 // we only test the byte register to keep the encoding short.
1584 // This is legal even if the register had high bits set since
1585 // this only sets flags registers based on the "AND" of the two operands,
1586 // and the immediate had zeros at those high bits.
1587 if (immediate.is_uint8() && reg < 4) {
1588 // Use zero-extended 8-bit immediate.
1589 if (reg == RegX8632::Encoded_Reg_eax) {
1590 EmitUint8(0xA8);
1591 } else {
1592 EmitUint8(0xF6);
1593 EmitUint8(0xC0 + reg);
1594 }
1595 EmitUint8(immediate.value() & 0xFF);
1596 } else if (reg == RegX8632::Encoded_Reg_eax) {
1597 // Use short form if the destination is EAX.
1598 if (Ty == IceType_i16)
1599 EmitOperandSizeOverride();
1600 EmitUint8(0xA9);
1601 EmitImmediate(Ty, immediate);
1602 } else {
1603 if (Ty == IceType_i16)
1604 EmitOperandSizeOverride();
1605 EmitUint8(0xF7);
1606 EmitRegisterOperand(0, reg);
1607 EmitImmediate(Ty, immediate);
1608 }
1609 }
1610
1611 void AssemblerX8632::test(Type Ty, const Address &addr,
1612 const Immediate &immediate) {
1613 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1614 // If the immediate is short, we only test the byte addr to keep the
1615 // encoding short.
1616 if (immediate.is_uint8()) {
1617 // Use zero-extended 8-bit immediate.
1618 EmitUint8(0xF6);
1619 EmitOperand(0, addr);
1620 EmitUint8(immediate.value() & 0xFF);
1621 } else {
1622 if (Ty == IceType_i16)
1623 EmitOperandSizeOverride();
1624 EmitUint8(0xF7);
1625 EmitOperand(0, addr);
1626 EmitImmediate(Ty, immediate);
1627 }
1628 }
1629
1630 void AssemblerX8632::And(Type Ty, GPRRegister dst, GPRRegister src) {
1631 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1632 if (Ty == IceType_i16)
1633 EmitOperandSizeOverride();
1634 if (isByteSizedType(Ty))
1635 EmitUint8(0x22);
1636 else
1637 EmitUint8(0x23);
1638 EmitRegisterOperand(dst, src);
1639 }
1640
1641 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) {
1642 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1643 if (Ty == IceType_i16)
1644 EmitOperandSizeOverride();
1645 if (isByteSizedType(Ty))
1646 EmitUint8(0x22);
1647 else
1648 EmitUint8(0x23);
1649 EmitOperand(dst, address);
1650 }
1651
1652 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Immediate &imm) {
1653 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1654 if (isByteSizedType(Ty)) {
1655 EmitComplexI8(4, Operand(dst), imm);
1656 return;
1657 }
1658 if (Ty == IceType_i16)
1659 EmitOperandSizeOverride();
1660 EmitComplex(Ty, 4, Operand(dst), imm);
1661 }
1662
1663 void AssemblerX8632::Or(Type Ty, GPRRegister dst, GPRRegister src) {
1664 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1665 if (Ty == IceType_i16)
1666 EmitOperandSizeOverride();
1667 if (isByteSizedType(Ty))
1668 EmitUint8(0x0A);
1669 else
1670 EmitUint8(0x0B);
1671 EmitRegisterOperand(dst, src);
1672 }
1673
1674 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) {
1675 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1676 if (Ty == IceType_i16)
1677 EmitOperandSizeOverride();
1678 if (isByteSizedType(Ty))
1679 EmitUint8(0x0A);
1680 else
1681 EmitUint8(0x0B);
1682 EmitOperand(dst, address);
1683 }
1684
1685 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Immediate &imm) {
1686 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1687 if (isByteSizedType(Ty)) {
1688 EmitComplexI8(1, Operand(dst), imm);
1689 return;
1690 }
1691 if (Ty == IceType_i16)
1692 EmitOperandSizeOverride();
1693 EmitComplex(Ty, 1, Operand(dst), imm);
1694 }
1695
1696 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, GPRRegister src) {
1697 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1698 if (Ty == IceType_i16)
1699 EmitOperandSizeOverride();
1700 if (isByteSizedType(Ty))
1701 EmitUint8(0x32);
1702 else
1703 EmitUint8(0x33);
1704 EmitRegisterOperand(dst, src);
1705 }
1706
1707 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) {
1708 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1709 if (Ty == IceType_i16)
1710 EmitOperandSizeOverride();
1711 if (isByteSizedType(Ty))
1712 EmitUint8(0x32);
1713 else
1714 EmitUint8(0x33);
1715 EmitOperand(dst, address);
1716 }
1717
1718 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Immediate &imm) {
1719 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1720 if (isByteSizedType(Ty)) {
1721 EmitComplexI8(6, Operand(dst), imm);
1722 return;
1723 }
1724 if (Ty == IceType_i16)
1725 EmitOperandSizeOverride();
1726 EmitComplex(Ty, 6, Operand(dst), imm);
1727 }
1728
1729 void AssemblerX8632::add(Type Ty, GPRRegister dst, GPRRegister src) {
1730 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1731 if (Ty == IceType_i16)
1732 EmitOperandSizeOverride();
1733 if (isByteSizedArithType(Ty))
1734 EmitUint8(0x02);
1735 else
1736 EmitUint8(0x03);
1737 EmitRegisterOperand(dst, src);
1738 }
1739
1740 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) {
1741 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1742 if (Ty == IceType_i16)
1743 EmitOperandSizeOverride();
1744 if (isByteSizedArithType(Ty))
1745 EmitUint8(0x02);
1746 else
1747 EmitUint8(0x03);
1748 EmitOperand(reg, address);
1749 }
1750
1751 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Immediate &imm) {
1752 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1753 if (isByteSizedArithType(Ty)) {
1754 EmitComplexI8(0, Operand(reg), imm);
1755 return;
1756 }
1757 if (Ty == IceType_i16)
1758 EmitOperandSizeOverride();
1759 EmitComplex(Ty, 0, Operand(reg), imm);
1760 }
1761
1762 void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) {
1763 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1764 if (Ty == IceType_i16)
1765 EmitOperandSizeOverride();
1766 if (isByteSizedArithType(Ty))
1767 EmitUint8(0x12);
1768 else
1769 EmitUint8(0x13);
1770 EmitRegisterOperand(dst, src);
1771 }
1772
1773 void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) {
1774 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1775 if (Ty == IceType_i16)
1776 EmitOperandSizeOverride();
1777 if (isByteSizedArithType(Ty))
1778 EmitUint8(0x12);
1779 else
1780 EmitUint8(0x13);
1781 EmitOperand(dst, address);
1782 }
1783
1784 void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) {
1785 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1786 if (isByteSizedArithType(Ty)) {
1787 EmitComplexI8(2, Operand(reg), imm);
1788 return;
1789 }
1790 if (Ty == IceType_i16)
1791 EmitOperandSizeOverride();
1792 EmitComplex(Ty, 2, Operand(reg), imm);
1793 }
1794
1795 void AssemblerX8632::sub(Type Ty, GPRRegister dst, GPRRegister src) {
1796 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1797 if (Ty == IceType_i16)
1798 EmitOperandSizeOverride();
1799 if (isByteSizedArithType(Ty))
1800 EmitUint8(0x2A);
1801 else
1802 EmitUint8(0x2B);
1803 EmitRegisterOperand(dst, src);
1804 }
1805
1806 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) {
1807 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1808 if (Ty == IceType_i16)
1809 EmitOperandSizeOverride();
1810 if (isByteSizedArithType(Ty))
1811 EmitUint8(0x2A);
1812 else
1813 EmitUint8(0x2B);
1814 EmitOperand(reg, address);
1815 }
1816
1817 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
1818 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1819 if (isByteSizedArithType(Ty)) {
1820 EmitComplexI8(5, Operand(reg), imm);
1821 return;
1822 }
1823 if (Ty == IceType_i16)
1824 EmitOperandSizeOverride();
1825 EmitComplex(Ty, 5, Operand(reg), imm);
1826 }
1827
1828 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, GPRRegister src) {
1829 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1830 if (Ty == IceType_i16)
1831 EmitOperandSizeOverride();
1832 if (isByteSizedArithType(Ty))
1833 EmitUint8(0x1A);
1834 else
1835 EmitUint8(0x1B);
1836 EmitRegisterOperand(dst, src);
1837 }
1838
1839 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) {
1840 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1841 if (Ty == IceType_i16)
1842 EmitOperandSizeOverride();
1843 if (isByteSizedArithType(Ty))
1844 EmitUint8(0x1A);
1845 else
1846 EmitUint8(0x1B);
1847 EmitOperand(dst, address);
1848 }
1849
1850 void AssemblerX8632::sbb(Type Ty, GPRRegister reg, const Immediate &imm) {
1851 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1852 if (isByteSizedArithType(Ty)) {
1853 EmitComplexI8(3, Operand(reg), imm);
1854 return;
1855 }
1856 if (Ty == IceType_i16)
1857 EmitOperandSizeOverride();
1858 EmitComplex(Ty, 3, Operand(reg), imm);
1859 }
1860
1861 void AssemblerX8632::cbw() {
1862 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1863 EmitOperandSizeOverride();
1864 EmitUint8(0x98);
1865 }
1866
1867 void AssemblerX8632::cwd() {
1868 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1869 EmitOperandSizeOverride();
1870 EmitUint8(0x99);
1871 }
1872
1873 void AssemblerX8632::cdq() {
1874 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1875 EmitUint8(0x99);
1876 }
1877
1878 void AssemblerX8632::div(Type Ty, GPRRegister reg) {
1879 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1880 if (Ty == IceType_i16)
1881 EmitOperandSizeOverride();
1882 if (isByteSizedArithType(Ty))
1883 EmitUint8(0xF6);
1884 else
1885 EmitUint8(0xF7);
1886 EmitRegisterOperand(6, reg);
1887 }
1888
1889 void AssemblerX8632::div(Type Ty, const Address &addr) {
1890 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1891 if (Ty == IceType_i16)
1892 EmitOperandSizeOverride();
1893 if (isByteSizedArithType(Ty))
1894 EmitUint8(0xF6);
1895 else
1896 EmitUint8(0xF7);
1897 EmitOperand(6, addr);
1898 }
1899
1900 void AssemblerX8632::idiv(Type Ty, GPRRegister reg) {
1901 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1902 if (Ty == IceType_i16)
1903 EmitOperandSizeOverride();
1904 if (isByteSizedArithType(Ty))
1905 EmitUint8(0xF6);
1906 else
1907 EmitUint8(0xF7);
1908 EmitRegisterOperand(7, reg);
1909 }
1910
1911 void AssemblerX8632::idiv(Type Ty, const Address &addr) {
1912 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1913 if (Ty == IceType_i16)
1914 EmitOperandSizeOverride();
1915 if (isByteSizedArithType(Ty))
1916 EmitUint8(0xF6);
1917 else
1918 EmitUint8(0xF7);
1919 EmitOperand(7, addr);
1920 }
1921
1922 void AssemblerX8632::imul(Type Ty, GPRRegister dst, GPRRegister src) {
1923 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1924 assert(Ty == IceType_i16 || Ty == IceType_i32);
1925 if (Ty == IceType_i16)
1926 EmitOperandSizeOverride();
1927 EmitUint8(0x0F);
1928 EmitUint8(0xAF);
1929 EmitRegisterOperand(dst, src);
1930 }
1931
1932 void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Address &address) {
1933 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1934 assert(Ty == IceType_i16 || Ty == IceType_i32);
1935 if (Ty == IceType_i16)
1936 EmitOperandSizeOverride();
1937 EmitUint8(0x0F);
1938 EmitUint8(0xAF);
1939 EmitOperand(reg, address);
1940 }
1941
1942 void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Immediate &imm) {
1943 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1944 assert(Ty == IceType_i16 || Ty == IceType_i32);
1945 if (Ty == IceType_i16)
1946 EmitOperandSizeOverride();
1947 if (imm.is_int8()) {
1948 EmitUint8(0x6B);
1949 EmitRegisterOperand(reg, reg);
1950 EmitUint8(imm.value() & 0xFF);
1951 } else {
1952 EmitUint8(0x69);
1953 EmitRegisterOperand(reg, reg);
1954 EmitImmediate(Ty, imm);
1955 }
1956 }
1957
1958 void AssemblerX8632::imul(Type Ty, GPRRegister reg) {
1959 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1960 if (Ty == IceType_i16)
1961 EmitOperandSizeOverride();
1962 if (isByteSizedArithType(Ty))
1963 EmitUint8(0xF6);
1964 else
1965 EmitUint8(0xF7);
1966 EmitRegisterOperand(5, reg);
1967 }
1968
1969 void AssemblerX8632::imul(Type Ty, const Address &address) {
1970 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1971 if (Ty == IceType_i16)
1972 EmitOperandSizeOverride();
1973 if (isByteSizedArithType(Ty))
1974 EmitUint8(0xF6);
1975 else
1976 EmitUint8(0xF7);
1977 EmitOperand(5, address);
1978 }
1979
1980 void AssemblerX8632::mul(Type Ty, GPRRegister reg) {
1981 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1982 if (Ty == IceType_i16)
1983 EmitOperandSizeOverride();
1984 if (isByteSizedArithType(Ty))
1985 EmitUint8(0xF6);
1986 else
1987 EmitUint8(0xF7);
1988 EmitRegisterOperand(4, reg);
1989 }
1990
1991 void AssemblerX8632::mul(Type Ty, const Address &address) {
1992 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1993 if (Ty == IceType_i16)
1994 EmitOperandSizeOverride();
1995 if (isByteSizedArithType(Ty))
1996 EmitUint8(0xF6);
1997 else
1998 EmitUint8(0xF7);
1999 EmitOperand(4, address);
2000 }
2001
2002 void AssemblerX8632::incl(GPRRegister reg) {
2003 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2004 EmitUint8(0x40 + reg);
2005 }
2006
2007 void AssemblerX8632::incl(const Address &address) {
2008 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2009 EmitUint8(0xFF);
2010 EmitOperand(0, address);
2011 }
2012
2013 void AssemblerX8632::decl(GPRRegister reg) {
2014 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2015 EmitUint8(0x48 + reg);
2016 }
2017
2018 void AssemblerX8632::decl(const Address &address) {
2019 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2020 EmitUint8(0xFF);
2021 EmitOperand(1, address);
2022 }
2023
2024 void AssemblerX8632::rol(Type Ty, GPRRegister reg, const Immediate &imm) {
2025 EmitGenericShift(0, Ty, reg, imm);
2026 }
2027
2028 void AssemblerX8632::rol(Type Ty, GPRRegister operand, GPRRegister shifter) {
2029 EmitGenericShift(0, Ty, Operand(operand), shifter);
2030 }
2031
2032 void AssemblerX8632::rol(Type Ty, const Address &operand, GPRRegister shifter) {
2033 EmitGenericShift(0, Ty, operand, shifter);
2034 }
2035
2036 void AssemblerX8632::shl(Type Ty, GPRRegister reg, const Immediate &imm) {
2037 EmitGenericShift(4, Ty, reg, imm);
2038 }
2039
2040 void AssemblerX8632::shl(Type Ty, GPRRegister operand, GPRRegister shifter) {
2041 EmitGenericShift(4, Ty, Operand(operand), shifter);
2042 }
2043
2044 void AssemblerX8632::shl(Type Ty, const Address &operand, GPRRegister shifter) {
2045 EmitGenericShift(4, Ty, operand, shifter);
2046 }
2047
2048 void AssemblerX8632::shr(Type Ty, GPRRegister reg, const Immediate &imm) {
2049 EmitGenericShift(5, Ty, reg, imm);
2050 }
2051
2052 void AssemblerX8632::shr(Type Ty, GPRRegister operand, GPRRegister shifter) {
2053 EmitGenericShift(5, Ty, Operand(operand), shifter);
2054 }
2055
2056 void AssemblerX8632::shr(Type Ty, const Address &operand, GPRRegister shifter) {
2057 EmitGenericShift(5, Ty, operand, shifter);
2058 }
2059
2060 void AssemblerX8632::sar(Type Ty, GPRRegister reg, const Immediate &imm) {
2061 EmitGenericShift(7, Ty, reg, imm);
2062 }
2063
2064 void AssemblerX8632::sar(Type Ty, GPRRegister operand, GPRRegister shifter) {
2065 EmitGenericShift(7, Ty, Operand(operand), shifter);
2066 }
2067
2068 void AssemblerX8632::sar(Type Ty, const Address &address, GPRRegister shifter) {
2069 EmitGenericShift(7, Ty, address, shifter);
2070 }
2071
2072 void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src) {
2073 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2074 assert(Ty == IceType_i16 || Ty == IceType_i32);
2075 if (Ty == IceType_i16)
2076 EmitOperandSizeOverride();
2077 EmitUint8(0x0F);
2078 EmitUint8(0xA5);
2079 EmitRegisterOperand(src, dst);
2080 }
2081
2082 void AssemblerX8632::shld(Type Ty, GPRRegister dst, GPRRegister src,
2083 const Immediate &imm) {
2084 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2085 assert(Ty == IceType_i16 || Ty == IceType_i32);
2086 assert(imm.is_int8());
2087 if (Ty == IceType_i16)
2088 EmitOperandSizeOverride();
2089 EmitUint8(0x0F);
2090 EmitUint8(0xA4);
2091 EmitRegisterOperand(src, dst);
2092 EmitUint8(imm.value() & 0xFF);
2093 }
2094
2095 void AssemblerX8632::shld(Type Ty, const Address &operand, GPRRegister src) {
2096 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2097 assert(Ty == IceType_i16 || Ty == IceType_i32);
2098 if (Ty == IceType_i16)
2099 EmitOperandSizeOverride();
2100 EmitUint8(0x0F);
2101 EmitUint8(0xA5);
2102 EmitOperand(src, operand);
2103 }
2104
2105 void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src) {
2106 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2107 assert(Ty == IceType_i16 || Ty == IceType_i32);
2108 if (Ty == IceType_i16)
2109 EmitOperandSizeOverride();
2110 EmitUint8(0x0F);
2111 EmitUint8(0xAD);
2112 EmitRegisterOperand(src, dst);
2113 }
2114
2115 void AssemblerX8632::shrd(Type Ty, GPRRegister dst, GPRRegister src,
2116 const Immediate &imm) {
2117 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2118 assert(Ty == IceType_i16 || Ty == IceType_i32);
2119 assert(imm.is_int8());
2120 if (Ty == IceType_i16)
2121 EmitOperandSizeOverride();
2122 EmitUint8(0x0F);
2123 EmitUint8(0xAC);
2124 EmitRegisterOperand(src, dst);
2125 EmitUint8(imm.value() & 0xFF);
2126 }
2127
2128 void AssemblerX8632::shrd(Type Ty, const Address &dst, GPRRegister src) {
2129 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2130 assert(Ty == IceType_i16 || Ty == IceType_i32);
2131 if (Ty == IceType_i16)
2132 EmitOperandSizeOverride();
2133 EmitUint8(0x0F);
2134 EmitUint8(0xAD);
2135 EmitOperand(src, dst);
2136 }
2137
2138 void AssemblerX8632::neg(Type Ty, GPRRegister reg) {
2139 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2140 if (Ty == IceType_i16)
2141 EmitOperandSizeOverride();
2142 if (isByteSizedArithType(Ty))
2143 EmitUint8(0xF6);
2144 else
2145 EmitUint8(0xF7);
2146 EmitRegisterOperand(3, reg);
2147 }
2148
2149 void AssemblerX8632::neg(Type Ty, const Address &addr) {
2150 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2151 if (Ty == IceType_i16)
2152 EmitOperandSizeOverride();
2153 if (isByteSizedArithType(Ty))
2154 EmitUint8(0xF6);
2155 else
2156 EmitUint8(0xF7);
2157 EmitOperand(3, addr);
2158 }
2159
2160 void AssemblerX8632::notl(GPRRegister reg) {
2161 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2162 EmitUint8(0xF7);
2163 EmitUint8(0xD0 | reg);
2164 }
2165
2166 void AssemblerX8632::bswap(Type Ty, GPRRegister reg) {
2167 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2168 assert(Ty == IceType_i32);
2169 (void)Ty;
2170 EmitUint8(0x0F);
2171 EmitUint8(0xC8 | reg);
2172 }
2173
2174 void AssemblerX8632::bsf(Type Ty, GPRRegister dst, GPRRegister src) {
2175 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2176 assert(Ty == IceType_i16 || Ty == IceType_i32);
2177 if (Ty == IceType_i16)
2178 EmitOperandSizeOverride();
2179 EmitUint8(0x0F);
2180 EmitUint8(0xBC);
2181 EmitRegisterOperand(dst, src);
2182 }
2183
2184 void AssemblerX8632::bsf(Type Ty, GPRRegister dst, const Address &src) {
2185 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2186 assert(Ty == IceType_i16 || Ty == IceType_i32);
2187 if (Ty == IceType_i16)
2188 EmitOperandSizeOverride();
2189 EmitUint8(0x0F);
2190 EmitUint8(0xBC);
2191 EmitOperand(dst, src);
2192 }
2193
2194 void AssemblerX8632::bsr(Type Ty, GPRRegister dst, GPRRegister src) {
2195 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2196 assert(Ty == IceType_i16 || Ty == IceType_i32);
2197 if (Ty == IceType_i16)
2198 EmitOperandSizeOverride();
2199 EmitUint8(0x0F);
2200 EmitUint8(0xBD);
2201 EmitRegisterOperand(dst, src);
2202 }
2203
2204 void AssemblerX8632::bsr(Type Ty, GPRRegister dst, const Address &src) {
2205 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2206 assert(Ty == IceType_i16 || Ty == IceType_i32);
2207 if (Ty == IceType_i16)
2208 EmitOperandSizeOverride();
2209 EmitUint8(0x0F);
2210 EmitUint8(0xBD);
2211 EmitOperand(dst, src);
2212 }
2213
2214 void AssemblerX8632::bt(GPRRegister base, GPRRegister offset) {
2215 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2216 EmitUint8(0x0F);
2217 EmitUint8(0xA3);
2218 EmitRegisterOperand(offset, base);
2219 }
2220
2221 void AssemblerX8632::ret() {
2222 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2223 EmitUint8(0xC3);
2224 }
2225
2226 void AssemblerX8632::ret(const Immediate &imm) {
2227 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2228 EmitUint8(0xC2);
2229 assert(imm.is_uint16());
2230 EmitUint8(imm.value() & 0xFF);
2231 EmitUint8((imm.value() >> 8) & 0xFF);
2232 }
2233
2234 void AssemblerX8632::nop(int size) {
2235 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2236 // There are nops up to size 15, but for now just provide up to size 8.
2237 assert(0 < size && size <= MAX_NOP_SIZE);
2238 switch (size) {
2239 case 1:
2240 EmitUint8(0x90);
2241 break;
2242 case 2:
2243 EmitUint8(0x66);
2244 EmitUint8(0x90);
2245 break;
2246 case 3:
2247 EmitUint8(0x0F);
2248 EmitUint8(0x1F);
2249 EmitUint8(0x00);
2250 break;
2251 case 4:
2252 EmitUint8(0x0F);
2253 EmitUint8(0x1F);
2254 EmitUint8(0x40);
2255 EmitUint8(0x00);
2256 break;
2257 case 5:
2258 EmitUint8(0x0F);
2259 EmitUint8(0x1F);
2260 EmitUint8(0x44);
2261 EmitUint8(0x00);
2262 EmitUint8(0x00);
2263 break;
2264 case 6:
2265 EmitUint8(0x66);
2266 EmitUint8(0x0F);
2267 EmitUint8(0x1F);
2268 EmitUint8(0x44);
2269 EmitUint8(0x00);
2270 EmitUint8(0x00);
2271 break;
2272 case 7:
2273 EmitUint8(0x0F);
2274 EmitUint8(0x1F);
2275 EmitUint8(0x80);
2276 EmitUint8(0x00);
2277 EmitUint8(0x00);
2278 EmitUint8(0x00);
2279 EmitUint8(0x00);
2280 break;
2281 case 8:
2282 EmitUint8(0x0F);
2283 EmitUint8(0x1F);
2284 EmitUint8(0x84);
2285 EmitUint8(0x00);
2286 EmitUint8(0x00);
2287 EmitUint8(0x00);
2288 EmitUint8(0x00);
2289 EmitUint8(0x00);
2290 break;
2291 default:
2292 llvm_unreachable("Unimplemented");
2293 }
2294 }
2295
2296 void AssemblerX8632::int3() {
2297 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2298 EmitUint8(0xCC);
2299 }
2300
2301 void AssemblerX8632::hlt() {
2302 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2303 EmitUint8(0xF4);
2304 }
2305
2306 void AssemblerX8632::ud2() {
2307 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2308 EmitUint8(0x0F);
2309 EmitUint8(0x0B);
2310 }
2311
2312 void AssemblerX8632::j(CondX86::BrCond condition, Label *label, bool near) {
2313 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2314 if (label->IsBound()) {
2315 static const int kShortSize = 2;
2316 static const int kLongSize = 6;
2317 intptr_t offset = label->Position() - buffer_.Size();
2318 assert(offset <= 0);
2319 if (Utils::IsInt(8, offset - kShortSize)) {
2320 // TODO(stichnot): Here and in jmp(), we may need to be more
2321 // conservative about the backward branch distance if the branch
2322 // instruction is within a bundle_lock sequence, because the
2323 // distance may increase when padding is added. This isn't an
2324 // issue for branches outside a bundle_lock, because if padding
2325 // is added, the retry may change it to a long backward branch
2326 // without affecting any of the bookkeeping.
2327 EmitUint8(0x70 + condition);
2328 EmitUint8((offset - kShortSize) & 0xFF);
2329 } else {
2330 EmitUint8(0x0F);
2331 EmitUint8(0x80 + condition);
2332 EmitInt32(offset - kLongSize);
2333 }
2334 } else if (near) {
2335 EmitUint8(0x70 + condition);
2336 EmitNearLabelLink(label);
2337 } else {
2338 EmitUint8(0x0F);
2339 EmitUint8(0x80 + condition);
2340 EmitLabelLink(label);
2341 }
2342 }
2343
2344 void AssemblerX8632::j(CondX86::BrCond condition,
2345 const ConstantRelocatable *label) {
2346 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2347 EmitUint8(0x0F);
2348 EmitUint8(0x80 + condition);
2349 EmitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
2350 EmitInt32(-4);
2351 }
2352
2353 void AssemblerX8632::jmp(GPRRegister reg) {
2354 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2355 EmitUint8(0xFF);
2356 EmitRegisterOperand(4, reg);
2357 }
2358
2359 void AssemblerX8632::jmp(Label *label, bool near) {
2360 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2361 if (label->IsBound()) {
2362 static const int kShortSize = 2;
2363 static const int kLongSize = 5;
2364 intptr_t offset = label->Position() - buffer_.Size();
2365 assert(offset <= 0);
2366 if (Utils::IsInt(8, offset - kShortSize)) {
2367 EmitUint8(0xEB);
2368 EmitUint8((offset - kShortSize) & 0xFF);
2369 } else {
2370 EmitUint8(0xE9);
2371 EmitInt32(offset - kLongSize);
2372 }
2373 } else if (near) {
2374 EmitUint8(0xEB);
2375 EmitNearLabelLink(label);
2376 } else {
2377 EmitUint8(0xE9);
2378 EmitLabelLink(label);
2379 }
2380 }
2381
2382 void AssemblerX8632::jmp(const ConstantRelocatable *label) {
2383 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2384 EmitUint8(0xE9);
2385 EmitFixup(this->createFixup(llvm::ELF::R_386_PC32, label));
2386 EmitInt32(-4);
2387 }
2388
2389 void AssemblerX8632::mfence() {
2390 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2391 EmitUint8(0x0F);
2392 EmitUint8(0xAE);
2393 EmitUint8(0xF0);
2394 }
2395
2396 void AssemblerX8632::lock() {
2397 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2398 EmitUint8(0xF0);
2399 }
2400
2401 void AssemblerX8632::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
2402 bool Locked) {
2403 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2404 if (Ty == IceType_i16)
2405 EmitOperandSizeOverride();
2406 if (Locked)
2407 EmitUint8(0xF0);
2408 EmitUint8(0x0F);
2409 if (isByteSizedArithType(Ty))
2410 EmitUint8(0xB0);
2411 else
2412 EmitUint8(0xB1);
2413 EmitOperand(reg, address);
2414 }
2415
2416 void AssemblerX8632::cmpxchg8b(const Address &address, bool Locked) {
2417 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2418 if (Locked)
2419 EmitUint8(0xF0);
2420 EmitUint8(0x0F);
2421 EmitUint8(0xC7);
2422 EmitOperand(1, address);
2423 }
2424
2425 void AssemblerX8632::xadd(Type Ty, const Address &addr, GPRRegister reg,
2426 bool Locked) {
2427 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2428 if (Ty == IceType_i16)
2429 EmitOperandSizeOverride();
2430 if (Locked)
2431 EmitUint8(0xF0);
2432 EmitUint8(0x0F);
2433 if (isByteSizedArithType(Ty))
2434 EmitUint8(0xC0);
2435 else
2436 EmitUint8(0xC1);
2437 EmitOperand(reg, addr);
2438 }
2439
2440 void AssemblerX8632::xchg(Type Ty, const Address &addr, GPRRegister reg) {
2441 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2442 if (Ty == IceType_i16)
2443 EmitOperandSizeOverride();
2444 if (isByteSizedArithType(Ty))
2445 EmitUint8(0x86);
2446 else
2447 EmitUint8(0x87);
2448 EmitOperand(reg, addr);
2449 }
2450
2451 void AssemblerX8632::EmitSegmentOverride(uint8_t prefix) {
2452 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2453 EmitUint8(prefix);
2454 }
2455
2456 void AssemblerX8632::Align(intptr_t alignment, intptr_t offset) {
2457 assert(llvm::isPowerOf2_32(alignment));
2458 intptr_t pos = offset + buffer_.GetPosition();
2459 intptr_t mod = pos & (alignment - 1);
2460 if (mod == 0) {
2461 return;
2462 }
2463 intptr_t bytes_needed = alignment - mod;
2464 while (bytes_needed > MAX_NOP_SIZE) {
2465 nop(MAX_NOP_SIZE);
2466 bytes_needed -= MAX_NOP_SIZE;
2467 }
2468 if (bytes_needed) {
2469 nop(bytes_needed);
2470 }
2471 assert(((offset + buffer_.GetPosition()) & (alignment - 1)) == 0);
2472 }
2473
2474 void AssemblerX8632::Bind(Label *label) {
2475 intptr_t bound = buffer_.Size();
2476 assert(!label->IsBound()); // Labels can only be bound once.
2477 while (label->IsLinked()) {
2478 intptr_t position = label->LinkPosition();
2479 intptr_t next = buffer_.Load<int32_t>(position);
2480 buffer_.Store<int32_t>(position, bound - (position + 4));
2481 label->position_ = next;
2482 }
2483 while (label->HasNear()) {
2484 intptr_t position = label->NearPosition();
2485 intptr_t offset = bound - (position + 1);
2486 assert(Utils::IsInt(8, offset));
2487 buffer_.Store<int8_t>(position, offset);
2488 }
2489 label->BindTo(bound);
2490 }
2491
2492 void AssemblerX8632::EmitOperand(int rm, const Operand &operand) {
2493 assert(rm >= 0 && rm < 8);
2494 const intptr_t length = operand.length_;
2495 assert(length > 0);
2496 // Emit the ModRM byte updated with the given RM value.
2497 assert((operand.encoding_[0] & 0x38) == 0);
2498 EmitUint8(operand.encoding_[0] + (rm << 3));
2499 if (operand.fixup()) {
2500 EmitFixup(operand.fixup());
2501 }
2502 // Emit the rest of the encoded operand.
2503 for (intptr_t i = 1; i < length; i++) {
2504 EmitUint8(operand.encoding_[i]);
2505 }
2506 }
2507
2508 void AssemblerX8632::EmitImmediate(Type Ty, const Immediate &imm) {
2509 if (Ty == IceType_i16) {
2510 assert(!imm.fixup());
2511 EmitInt16(imm.value());
2512 } else {
2513 if (imm.fixup()) {
2514 EmitFixup(imm.fixup());
2515 }
2516 EmitInt32(imm.value());
2517 }
2518 }
2519
2520 void AssemblerX8632::EmitComplexI8(int rm, const Operand &operand,
2521 const Immediate &immediate) {
2522 assert(rm >= 0 && rm < 8);
2523 assert(immediate.is_int8());
2524 if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
2525 // Use short form if the destination is al.
2526 EmitUint8(0x04 + (rm << 3));
2527 EmitUint8(immediate.value() & 0xFF);
2528 } else {
2529 // Use sign-extended 8-bit immediate.
2530 EmitUint8(0x80);
2531 EmitOperand(rm, operand);
2532 EmitUint8(immediate.value() & 0xFF);
2533 }
2534 }
2535
2536 void AssemblerX8632::EmitComplex(Type Ty, int rm, const Operand &operand,
2537 const Immediate &immediate) {
2538 assert(rm >= 0 && rm < 8);
2539 if (immediate.is_int8()) {
2540 // Use sign-extended 8-bit immediate.
2541 EmitUint8(0x83);
2542 EmitOperand(rm, operand);
2543 EmitUint8(immediate.value() & 0xFF);
2544 } else if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
2545 // Use short form if the destination is eax.
2546 EmitUint8(0x05 + (rm << 3));
2547 EmitImmediate(Ty, immediate);
2548 } else {
2549 EmitUint8(0x81);
2550 EmitOperand(rm, operand);
2551 EmitImmediate(Ty, immediate);
2552 }
2553 }
2554
2555 void AssemblerX8632::EmitLabel(Label *label, intptr_t instruction_size) {
2556 if (label->IsBound()) {
2557 intptr_t offset = label->Position() - buffer_.Size();
2558 assert(offset <= 0);
2559 EmitInt32(offset - instruction_size);
2560 } else {
2561 EmitLabelLink(label);
2562 }
2563 }
2564
2565 void AssemblerX8632::EmitLabelLink(Label *label) {
2566 assert(!label->IsBound());
2567 intptr_t position = buffer_.Size();
2568 EmitInt32(label->position_);
2569 if (!getPreliminary())
2570 label->LinkTo(position);
2571 }
2572
2573 void AssemblerX8632::EmitNearLabelLink(Label *label) {
2574 assert(!label->IsBound());
2575 intptr_t position = buffer_.Size();
2576 EmitUint8(0);
2577 if (!getPreliminary())
2578 label->NearLinkTo(position);
2579 }
2580
2581 void AssemblerX8632::EmitGenericShift(int rm, Type Ty, GPRRegister reg,
2582 const Immediate &imm) {
2583 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2584 assert(imm.is_int8());
2585 if (Ty == IceType_i16)
2586 EmitOperandSizeOverride();
2587 if (imm.value() == 1) {
2588 EmitUint8(isByteSizedArithType(Ty) ? 0xD0 : 0xD1);
2589 EmitOperand(rm, Operand(reg));
2590 } else {
2591 EmitUint8(isByteSizedArithType(Ty) ? 0xC0 : 0xC1);
2592 EmitOperand(rm, Operand(reg));
2593 EmitUint8(imm.value() & 0xFF);
2594 }
2595 }
2596
2597 void AssemblerX8632::EmitGenericShift(int rm, Type Ty, const Operand &operand,
2598 GPRRegister shifter) {
2599 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2600 assert(shifter == RegX8632::Encoded_Reg_ecx);
2601 (void)shifter;
2602 if (Ty == IceType_i16)
2603 EmitOperandSizeOverride();
2604 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
2605 EmitOperand(rm, operand);
2606 }
2607
2608 } // end of namespace X8632
2609 } // end of namespace Ice
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