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Issue 1176703002: Make guard_cid and nullable_cid half words. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/heap.h" 10 #include "vm/heap.h"
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343 343
344 void Assembler::movw(const Address& dst, Register src) { 344 void Assembler::movw(const Address& dst, Register src) {
345 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 345 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
346 EmitOperandSizeOverride(); 346 EmitOperandSizeOverride();
347 EmitOperandREX(src, dst, REX_NONE); 347 EmitOperandREX(src, dst, REX_NONE);
348 EmitUint8(0x89); 348 EmitUint8(0x89);
349 EmitOperand(src & 7, dst); 349 EmitOperand(src & 7, dst);
350 } 350 }
351 351
352 352
353 void Assembler::movw(const Address& dst, const Immediate& imm) {
354 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
355 EmitOperandSizeOverride();
356 EmitUint8(0xC7);
357 EmitOperand(0, dst);
358 EmitUint8(imm.value() & 0xFF);
359 EmitUint8((imm.value() >> 8) & 0xFF);
360 }
361
362
353 void Assembler::movq(Register dst, const Immediate& imm) { 363 void Assembler::movq(Register dst, const Immediate& imm) {
354 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 364 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
355 if (imm.is_int32()) { 365 if (imm.is_int32()) {
356 Operand operand(dst); 366 Operand operand(dst);
357 EmitOperandREX(0, operand, REX_W); 367 EmitOperandREX(0, operand, REX_W);
358 EmitUint8(0xC7); 368 EmitUint8(0xC7);
359 EmitOperand(0, operand); 369 EmitOperand(0, operand);
360 } else { 370 } else {
361 EmitRegisterREX(dst, REX_W); 371 EmitRegisterREX(dst, REX_W);
362 EmitUint8(0xB8 | (dst & 7)); 372 EmitUint8(0xB8 | (dst & 7));
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1412 void Assembler::cmpb(const Address& address, const Immediate& imm) { 1422 void Assembler::cmpb(const Address& address, const Immediate& imm) {
1413 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1423 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1414 EmitOperandREX(7, address, REX_NONE); 1424 EmitOperandREX(7, address, REX_NONE);
1415 EmitUint8(0x80); 1425 EmitUint8(0x80);
1416 EmitOperand(7, address); 1426 EmitOperand(7, address);
1417 ASSERT(imm.is_int8()); 1427 ASSERT(imm.is_int8());
1418 EmitUint8(imm.value() & 0xFF); 1428 EmitUint8(imm.value() & 0xFF);
1419 } 1429 }
1420 1430
1421 1431
1432 void Assembler::cmpw(Register reg, const Address& address) {
1433 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1434 EmitOperandSizeOverride();
1435 EmitUint8(0x3B);
1436 EmitOperand(reg, address);
1437 }
1438
1439
1440 void Assembler::cmpw(const Address& address, const Immediate& imm) {
1441 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1442 EmitOperandSizeOverride();
1443 EmitUint8(0x81);
1444 EmitOperand(7, address);
1445 EmitUint8(imm.value() & 0xFF);
1446 EmitUint8((imm.value() >> 8) & 0xFF);
1447 }
1448
1449
1422 void Assembler::cmpl(Register reg, const Immediate& imm) { 1450 void Assembler::cmpl(Register reg, const Immediate& imm) {
1423 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1451 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1424 EmitRegisterREX(reg, REX_NONE); 1452 EmitRegisterREX(reg, REX_NONE);
1425 EmitComplex(7, Operand(reg), imm); 1453 EmitComplex(7, Operand(reg), imm);
1426 } 1454 }
1427 1455
1428 1456
1429 void Assembler::cmpl(Register reg0, Register reg1) { 1457 void Assembler::cmpl(Register reg0, Register reg1) {
1430 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1458 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1431 Operand operand(reg1); 1459 Operand operand(reg1);
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3898 3926
3899 3927
3900 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3928 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3901 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 3929 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
3902 return xmm_reg_names[reg]; 3930 return xmm_reg_names[reg];
3903 } 3931 }
3904 3932
3905 } // namespace dart 3933 } // namespace dart
3906 3934
3907 #endif // defined TARGET_ARCH_X64 3935 #endif // defined TARGET_ARCH_X64
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