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Side by Side Diff: runtime/vm/assembler_ia32.cc

Issue 1176703002: Make guard_cid and nullable_cid half words. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/cpu.h" 10 #include "vm/cpu.h"
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261 261
262 262
263 void Assembler::movw(const Address& dst, Register src) { 263 void Assembler::movw(const Address& dst, Register src) {
264 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 264 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
265 EmitOperandSizeOverride(); 265 EmitOperandSizeOverride();
266 EmitUint8(0x89); 266 EmitUint8(0x89);
267 EmitOperand(src, dst); 267 EmitOperand(src, dst);
268 } 268 }
269 269
270 270
271 void Assembler::movw(const Address& dst, const Immediate& imm) {
272 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
273 EmitOperandSizeOverride();
274 EmitUint8(0xC7);
275 EmitOperand(0, dst);
276 EmitUint8(imm.value() & 0xFF);
277 EmitUint8((imm.value() >> 8) & 0xFF);
278 }
279
280
271 void Assembler::leal(Register dst, const Address& src) { 281 void Assembler::leal(Register dst, const Address& src) {
272 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 282 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
273 EmitUint8(0x8D); 283 EmitUint8(0x8D);
274 EmitOperand(dst, src); 284 EmitOperand(dst, src);
275 } 285 }
276 286
277 287
278 // Move if not overflow. 288 // Move if not overflow.
279 void Assembler::cmovno(Register dst, Register src) { 289 void Assembler::cmovno(Register dst, Register src) {
280 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 290 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
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1410 EmitOperand(reg, address); 1420 EmitOperand(reg, address);
1411 } 1421 }
1412 1422
1413 1423
1414 void Assembler::cmpl(const Address& address, const Immediate& imm) { 1424 void Assembler::cmpl(const Address& address, const Immediate& imm) {
1415 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1425 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1416 EmitComplex(7, address, imm); 1426 EmitComplex(7, address, imm);
1417 } 1427 }
1418 1428
1419 1429
1430 void Assembler::cmpw(Register reg, const Address& address) {
1431 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1432 EmitOperandSizeOverride();
1433 EmitUint8(0x3B);
1434 EmitOperand(reg, address);
1435 }
1436
1437
1438 void Assembler::cmpw(const Address& address, const Immediate& imm) {
1439 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1440 EmitOperandSizeOverride();
1441 EmitUint8(0x81);
1442 EmitOperand(7, address);
1443 EmitUint8(imm.value() & 0xFF);
1444 EmitUint8((imm.value() >> 8) & 0xFF);
1445 }
1446
1447
1420 void Assembler::cmpb(const Address& address, const Immediate& imm) { 1448 void Assembler::cmpb(const Address& address, const Immediate& imm) {
1421 ASSERT(imm.is_int8()); 1449 ASSERT(imm.is_int8());
1422 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1450 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1423 EmitUint8(0x80); 1451 EmitUint8(0x80);
1424 EmitOperand(7, address); 1452 EmitOperand(7, address);
1425 EmitUint8(imm.value() & 0xFF); 1453 EmitUint8(imm.value() & 0xFF);
1426 } 1454 }
1427 1455
1428 1456
1429 void Assembler::testl(Register reg1, Register reg2) { 1457 void Assembler::testl(Register reg1, Register reg2) {
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3118 3146
3119 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3147 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3120 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 3148 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
3121 return xmm_reg_names[reg]; 3149 return xmm_reg_names[reg];
3122 } 3150 }
3123 3151
3124 3152
3125 } // namespace dart 3153 } // namespace dart
3126 3154
3127 #endif // defined TARGET_ARCH_IA32 3155 #endif // defined TARGET_ARCH_IA32
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