Chromium Code Reviews| Index: src/IceInstMIPS32.cpp |
| diff --git a/src/IceInstMIPS32.cpp b/src/IceInstMIPS32.cpp |
| new file mode 100644 |
| index 0000000000000000000000000000000000000000..4b6e6267bc2c57df2d607a1a601a3104792a9ac2 |
| --- /dev/null |
| +++ b/src/IceInstMIPS32.cpp |
| @@ -0,0 +1,62 @@ |
| +//===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
|
jvoung (off chromium)
2015/07/07 18:02:35
ARM32 -> MIPS32 in two places
reed.kotler
2015/07/07 21:54:54
Done.
|
| +// |
| +// The Subzero Code Generator |
| +// |
| +// This file is distributed under the University of Illinois Open Source |
| +// License. See LICENSE.TXT for details. |
| +// |
| +//===----------------------------------------------------------------------===// |
| +// |
| +// This file implements the InstARM32 and OperandARM32 classes, |
|
jvoung (off chromium)
2015/07/07 18:02:34
MIPS32
Also, for doxygen do:
"""
//===---
///
//
reed.kotler
2015/07/07 21:54:54
Done.
|
| +// primarily the constructors and the dump()/emit() methods. |
| +// |
| +//===----------------------------------------------------------------------===// |
| + |
| +#include "IceAssemblerMIPS32.h" |
| +#include "IceCfg.h" |
| +#include "IceCfgNode.h" |
| +#include "IceInst.h" |
| +#include "IceInstMIPS32.h" |
| +#include "IceOperand.h" |
| +#include "IceRegistersMIPS32.h" |
| +#include "IceTargetLoweringMIPS32.h" |
| + |
| +namespace Ice { |
| + |
| +namespace {} |
|
jvoung (off chromium)
2015/07/07 18:02:34
Jim had a comment about removing this stray namesp
reed.kotler
2015/07/07 21:54:54
Done.
|
| + |
| +InstMIPS32Ret::InstMIPS32Ret(Cfg *Func, Variable *LR, Variable *Source) |
|
jvoung (off chromium)
2015/07/07 18:02:34
LR -> RA
reed.kotler
2015/07/07 21:54:54
Done.
|
| + : InstMIPS32(Func, InstMIPS32::Ret, Source ? 2 : 1, nullptr) { |
| + addSource(LR); |
| + if (Source) |
| + addSource(Source); |
| +} |
| + |
| +void InstMIPS32Ret::emit(const Cfg *Func) const { |
| + if (!ALLOW_DUMP) |
| + return; |
| + assert(getSrcSize() > 0); |
| + Variable *LR = llvm::cast<Variable>(getSrc(0)); |
| + assert(LR->hasReg()); |
| + assert(LR->getRegNum() == RegMIPS32::Reg_RA); |
|
jvoung (off chromium)
2015/07/07 18:02:34
LR -> RA
reed.kotler
2015/07/07 21:54:54
Done.
|
| + Ostream &Str = Func->getContext()->getStrEmit(); |
| + Str << "\t" |
| + << "jr $ra" |
|
jvoung (off chromium)
2015/07/07 18:02:34
no need to print "$ra" here as part of "jr $ra" --
reed.kotler
2015/07/07 21:54:54
This is needed for now because emitVariable is not
jvoung (off chromium)
2015/07/08 00:39:11
Okay.
|
| + << "\t"; |
| + LR->emit(Func); |
| +} |
| + |
| +void InstMIPS32Ret::emitIAS(const Cfg *Func) const { |
| + (void)Func; |
| + llvm_unreachable("Not yet implemented"); |
| +} |
| + |
| +void InstMIPS32Ret::dump(const Cfg *Func) const { |
| + if (!ALLOW_DUMP) |
| + return; |
| + Ostream &Str = Func->getContext()->getStrDump(); |
| + Type Ty = (getSrcSize() == 1 ? IceType_void : getSrc(0)->getType()); |
| + Str << "ret." << Ty << " "; |
| + dumpSources(Func); |
| +} |
| +} |