OLD | NEW |
1 //===- subzero/src/IceInstMIPS32.def - X-Macros for MIPS32 insts --*- C++ -*-===
// | 1 //===- subzero/src/IceInstMIPS32.def - X-Macros for MIPS32 insts --*- C++ -*-===
// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file defines properties of MIPS32 instructions in the form of x-macros. | 10 // This file defines properties of MIPS32 instructions in the form of x-macros. |
11 // | 11 // |
12 //===----------------------------------------------------------------------===// | 12 //===----------------------------------------------------------------------===// |
13 | 13 |
14 #ifndef SUBZERO_SRC_ICEINSTMIPS32_DEF | 14 #ifndef SUBZERO_SRC_ICEINSTMIPS32_DEF |
15 #define SUBZERO_SRC_ICEINSTMIPS32_DEF | 15 #define SUBZERO_SRC_ICEINSTMIPS32_DEF |
16 | 16 |
17 // NOTE: PC and SP are not considered isInt, to avoid register allocating. | 17 // NOTE: PC and SP are not considered isInt, to avoid register allocating. |
18 // TODO (reed kotler). This needs to be scrubbed and is a placeholder to get | 18 // TODO(reed kotler). This needs to be scrubbed and is a placeholder to get |
19 // the Mips skeleton in. | 19 // the Mips skeleton in. |
20 // | 20 // |
21 #define REGMIPS32_GPR_TABLE \ | 21 #define REGMIPS32_GPR_TABLE \ |
22 /* val, encode, name, scratch, preserved, stackptr, frameptr, isInt, isFP */ \ | 22 /* val, encode, name, scratch, preserved, stackptr, frameptr, isInt, isFP */ \ |
23 X(Reg_ZERO, = 0, "zero", 0, 0, 0, 0, 0, 0) \ | 23 X(Reg_ZERO, = 0, "zero", 0, 0, 0, 0, 0, 0) \ |
24 X(Reg_AT, = Reg_ZERO + 1, "at", 1, 0, 0, 0, 1, 0) \ | 24 X(Reg_AT, = Reg_ZERO + 1, "at", 1, 0, 0, 0, 1, 0) \ |
25 X(Reg_V0, = Reg_ZERO + 2, "v0", 1, 0, 0, 0, 1, 0) \ | 25 X(Reg_V0, = Reg_ZERO + 2, "v0", 1, 0, 0, 0, 1, 0) \ |
26 X(Reg_V1, = Reg_ZERO + 3, "v1", 1, 0, 0, 0, 1, 0) \ | 26 X(Reg_V1, = Reg_ZERO + 3, "v1", 1, 0, 0, 0, 1, 0) \ |
27 X(Reg_A0, = Reg_ZERO + 4, "a0", 1, 0, 0, 0, 1, 0) \ | 27 X(Reg_A0, = Reg_ZERO + 4, "a0", 1, 0, 0, 0, 1, 0) \ |
28 X(Reg_A1, = Reg_ZERO + 5, "a1", 1, 0, 0, 0, 1, 0) \ | 28 X(Reg_A1, = Reg_ZERO + 5, "a1", 1, 0, 0, 0, 1, 0) \ |
(...skipping 43 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
72 #define REGMIPS32_TABLE_BOUNDS \ | 72 #define REGMIPS32_TABLE_BOUNDS \ |
73 /* val, init */ \ | 73 /* val, init */ \ |
74 X(Reg_GPR_First, = Reg_ZERO) \ | 74 X(Reg_GPR_First, = Reg_ZERO) \ |
75 X(Reg_GPR_Last, = Reg_RA) | 75 X(Reg_GPR_Last, = Reg_RA) |
76 //define X(val, init) | 76 //define X(val, init) |
77 | 77 |
78 // TODO(reed kotler): add condition code tables, etc. | 78 // TODO(reed kotler): add condition code tables, etc. |
79 | 79 |
80 | 80 |
81 #endif // SUBZERO_SRC_ICEINSTMIPS32_DEF | 81 #endif // SUBZERO_SRC_ICEINSTMIPS32_DEF |
OLD | NEW |