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Side by Side Diff: runtime/vm/instructions_arm64.h

Issue 1175523002: Object pool with support for untagged entries. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // Classes that describe assembly patterns as used by inline caches. 4 // Classes that describe assembly patterns as used by inline caches.
5 5
6 #ifndef VM_INSTRUCTIONS_ARM64_H_ 6 #ifndef VM_INSTRUCTIONS_ARM64_H_
7 #define VM_INSTRUCTIONS_ARM64_H_ 7 #define VM_INSTRUCTIONS_ARM64_H_
8 8
9 #ifndef VM_INSTRUCTIONS_H_ 9 #ifndef VM_INSTRUCTIONS_H_
10 #error Do not include instructions_arm64.h directly; use instructions.h instead. 10 #error Do not include instructions_arm64.h directly; use instructions.h instead.
11 #endif 11 #endif
12 12
13 #include "vm/constants_arm64.h" 13 #include "vm/constants_arm64.h"
14 #include "vm/object.h" 14 #include "vm/object.h"
15 15
16 namespace dart { 16 namespace dart {
17 17
18 class InstructionPattern : public AllStatic { 18 class InstructionPattern : public AllStatic {
19 public: 19 public:
20 // Decodes a load sequence ending at 'end' (the last instruction of the 20 // Decodes a load sequence ending at 'end' (the last instruction of the
21 // load sequence is the instruction before the one at end). Returns the 21 // load sequence is the instruction before the one at end). Returns the
22 // address of the first instruction in the sequence. Returns the register 22 // address of the first instruction in the sequence. Returns the register
23 // being loaded and the loaded object in the output parameters 'reg' and 23 // being loaded and the loaded object in the output parameters 'reg' and
24 // 'obj' respectively. 24 // 'obj' respectively.
25 static uword DecodeLoadObject(uword end, 25 static uword DecodeLoadObject(uword end,
26 const Array& object_pool, 26 const ObjectPool& object_pool,
27 Register* reg, 27 Register* reg,
28 Object* obj); 28 Object* obj);
29 29
30 // Decodes a load sequence ending at 'end' (the last instruction of the 30 // Decodes a load sequence ending at 'end' (the last instruction of the
31 // load sequence is the instruction before the one at end). Returns the 31 // load sequence is the instruction before the one at end). Returns the
32 // address of the first instruction in the sequence. Returns the register 32 // address of the first instruction in the sequence. Returns the register
33 // being loaded and the loaded immediate value in the output parameters 33 // being loaded and the loaded immediate value in the output parameters
34 // 'reg' and 'value' respectively. 34 // 'reg' and 'value' respectively.
35 static uword DecodeLoadWordImmediate(uword end, 35 static uword DecodeLoadWordImmediate(uword end,
36 Register* reg, 36 Register* reg,
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64 uword TargetAddress() const; 64 uword TargetAddress() const;
65 void SetTargetAddress(uword target_address) const; 65 void SetTargetAddress(uword target_address) const;
66 66
67 // This constant length is only valid for inserted call patterns used for 67 // This constant length is only valid for inserted call patterns used for
68 // lazy deoptimization. Regular call pattern may vary in length. 68 // lazy deoptimization. Regular call pattern may vary in length.
69 static const int kLengthInBytes = 5 * Instr::kInstrSize; 69 static const int kLengthInBytes = 5 * Instr::kInstrSize;
70 70
71 static void InsertAt(uword pc, uword target_address); 71 static void InsertAt(uword pc, uword target_address);
72 72
73 private: 73 private:
74 const Array& object_pool_; 74 const ObjectPool& object_pool_;
75 75
76 uword end_; 76 uword end_;
77 uword args_desc_load_end_; 77 uword args_desc_load_end_;
78 uword ic_data_load_end_; 78 uword ic_data_load_end_;
79 79
80 intptr_t target_address_pool_index_; 80 intptr_t target_address_pool_index_;
81 Array& args_desc_; 81 Array& args_desc_;
82 ICData& ic_data_; 82 ICData& ic_data_;
83 83
84 DISALLOW_COPY_AND_ASSIGN(CallPattern); 84 DISALLOW_COPY_AND_ASSIGN(CallPattern);
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119 119
120 bool IsValid() const; 120 bool IsValid() const;
121 121
122 private: 122 private:
123 const uword pc_; 123 const uword pc_;
124 }; 124 };
125 125
126 } // namespace dart 126 } // namespace dart
127 127
128 #endif // VM_INSTRUCTIONS_ARM64_H_ 128 #endif // VM_INSTRUCTIONS_ARM64_H_
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