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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // Classes that describe assembly patterns as used by inline caches. | 4 // Classes that describe assembly patterns as used by inline caches. |
| 5 | 5 |
| 6 #ifndef VM_INSTRUCTIONS_ARM_H_ | 6 #ifndef VM_INSTRUCTIONS_ARM_H_ |
| 7 #define VM_INSTRUCTIONS_ARM_H_ | 7 #define VM_INSTRUCTIONS_ARM_H_ |
| 8 | 8 |
| 9 #ifndef VM_INSTRUCTIONS_H_ | 9 #ifndef VM_INSTRUCTIONS_H_ |
| 10 #error Do not include instructions_arm.h directly; use instructions.h instead. | 10 #error Do not include instructions_arm.h directly; use instructions.h instead. |
| 11 #endif | 11 #endif |
| 12 | 12 |
| 13 #include "vm/constants_arm.h" | 13 #include "vm/constants_arm.h" |
| 14 #include "vm/object.h" | 14 #include "vm/object.h" |
| 15 | 15 |
| 16 namespace dart { | 16 namespace dart { |
| 17 | 17 |
| 18 class InstructionPattern : public AllStatic { | 18 class InstructionPattern : public AllStatic { |
| 19 public: | 19 public: |
| 20 // Decodes a load sequence ending at 'end' (the last instruction of the | 20 // Decodes a load sequence ending at 'end' (the last instruction of the |
| 21 // load sequence is the instruction before the one at end). Returns the | 21 // load sequence is the instruction before the one at end). Returns the |
| 22 // address of the first instruction in the sequence. Returns the register | 22 // address of the first instruction in the sequence. Returns the register |
| 23 // being loaded and the loaded object in the output parameters 'reg' and | 23 // being loaded and the loaded object in the output parameters 'reg' and |
| 24 // 'obj' respectively. | 24 // 'obj' respectively. |
| 25 static uword DecodeLoadObject(uword end, | 25 static uword DecodeLoadObject(uword end, |
| 26 const Array& object_pool, | 26 const ObjectPool& object_pool, |
| 27 Register* reg, | 27 Register* reg, |
| 28 Object* obj); | 28 Object* obj); |
| 29 | 29 |
| 30 // Decodes a load sequence ending at 'end' (the last instruction of the | 30 // Decodes a load sequence ending at 'end' (the last instruction of the |
| 31 // load sequence is the instruction before the one at end). Returns the | 31 // load sequence is the instruction before the one at end). Returns the |
| 32 // address of the first instruction in the sequence. Returns the register | 32 // address of the first instruction in the sequence. Returns the register |
| 33 // being loaded and the loaded immediate value in the output parameters | 33 // being loaded and the loaded immediate value in the output parameters |
| 34 // 'reg' and 'value' respectively. | 34 // 'reg' and 'value' respectively. |
| 35 static uword DecodeLoadWordImmediate(uword end, | 35 static uword DecodeLoadWordImmediate(uword end, |
| 36 Register* reg, | 36 Register* reg, |
| (...skipping 20 matching lines...) Expand all Loading... |
| 57 uword TargetAddress() const; | 57 uword TargetAddress() const; |
| 58 void SetTargetAddress(uword target_address) const; | 58 void SetTargetAddress(uword target_address) const; |
| 59 | 59 |
| 60 // This constant length is only valid for inserted call patterns used for | 60 // This constant length is only valid for inserted call patterns used for |
| 61 // lazy deoptimization. Regular call pattern may vary in length. | 61 // lazy deoptimization. Regular call pattern may vary in length. |
| 62 static int LengthInBytes(); | 62 static int LengthInBytes(); |
| 63 | 63 |
| 64 static void InsertAt(uword pc, uword target_address); | 64 static void InsertAt(uword pc, uword target_address); |
| 65 | 65 |
| 66 private: | 66 private: |
| 67 const Array& object_pool_; | 67 const ObjectPool& object_pool_; |
| 68 | 68 |
| 69 uword end_; | 69 uword end_; |
| 70 uword args_desc_load_end_; | 70 uword args_desc_load_end_; |
| 71 uword ic_data_load_end_; | 71 uword ic_data_load_end_; |
| 72 | 72 |
| 73 intptr_t target_address_pool_index_; | 73 intptr_t target_address_pool_index_; |
| 74 Array& args_desc_; | 74 Array& args_desc_; |
| 75 ICData& ic_data_; | 75 ICData& ic_data_; |
| 76 | 76 |
| 77 DISALLOW_COPY_AND_ASSIGN(CallPattern); | 77 DISALLOW_COPY_AND_ASSIGN(CallPattern); |
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| 110 | 110 |
| 111 bool IsValid() const; | 111 bool IsValid() const; |
| 112 | 112 |
| 113 private: | 113 private: |
| 114 const uword pc_; | 114 const uword pc_; |
| 115 }; | 115 }; |
| 116 | 116 |
| 117 } // namespace dart | 117 } // namespace dart |
| 118 | 118 |
| 119 #endif // VM_INSTRUCTIONS_ARM_H_ | 119 #endif // VM_INSTRUCTIONS_ARM_H_ |
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