Object pool with support for untagged entries.

runtime/vm/instructions_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/constants_arm.h"
 #include "vm/cpu.h"
 #include "vm/instructions.h"
 #include "vm/object.h"
 
 namespace dart {
 
 CallPattern::CallPattern(uword pc, const Code& code)
-    : object_pool_(Array::Handle(code.ObjectPool())),
+    : object_pool_(ObjectPool::Handle(code.GetObjectPool())),
       end_(pc),
       args_desc_load_end_(0),
       ic_data_load_end_(0),
       target_address_pool_index_(-1),
       args_desc_(Array::Handle()),
       ic_data_(ICData::Handle()) {
   ASSERT(code.ContainsInstructionAt(pc));
   // Last instruction: blx lr.
   ASSERT(*(reinterpret_cast<uword*>(end_) - 1) == 0xe12fff3e);
 
@@ skipping 16 matching lines @@
   }
 }
 
 
 // Decodes a load sequence ending at 'end' (the last instruction of the load
 // sequence is the instruction before the one at end).  Returns a pointer to
 // the first instruction in the sequence.  Returns the register being loaded
 // and the loaded object in the output parameters 'reg' and 'obj'
 // respectively.
 uword InstructionPattern::DecodeLoadObject(uword end,
-                                           const Array& object_pool,
+                                           const ObjectPool& object_pool,
                                            Register* reg,
                                            Object* obj) {
   uword start = 0;
   Instr* instr = Instr::At(end - Instr::kInstrSize);
   if ((instr->InstructionBits() & 0xfff00000) == 0xe5900000) {
     // ldr reg, [reg, #+offset]
     intptr_t index = 0;
     start = DecodeLoadWordFromPool(end, reg, &index);
-    *obj = object_pool.At(index);
+    *obj = object_pool.ObjectAt(index);
   } else {
     intptr_t value = 0;
     start = DecodeLoadWordImmediate(end, reg, &value);
     *obj = reinterpret_cast<RawObject*>(value);
   }
   return start;
 }
 
 
 // Decodes a load sequence ending at 'end' (the last instruction of the load
@@ skipping 105 matching lines @@
                                          object_pool_,
                                          &reg,
                                          &args_desc_);
     ASSERT(reg == R4);
   }
   return args_desc_.raw();
 }
 
 
 uword CallPattern::TargetAddress() const {
-  ASSERT(target_address_pool_index_ >= 0);
-  const Object& target_address =
-      Object::Handle(object_pool_.At(target_address_pool_index_));
-  ASSERT(target_address.IsSmi());
-  // The address is stored in the object array as a RawSmi.
-  return reinterpret_cast<uword>(target_address.raw());
+  return object_pool_.RawValueAt(target_address_pool_index_);
 }
 
 
 void CallPattern::SetTargetAddress(uword target_address) const {
-  ASSERT(Utils::IsAligned(target_address, 4));
-  // The address is stored in the object array as a RawSmi.
-  const Smi& smi = Smi::Handle(reinterpret_cast<RawSmi*>(target_address));
-  object_pool_.SetAt(target_address_pool_index_, smi);
+  object_pool_.SetRawValueAt(target_address_pool_index_, target_address);
   // No need to flush the instruction cache, since the code is not modified.
 }
 
 
 void CallPattern::InsertAt(uword pc, uword target_address) {
   const ARMVersion version = TargetCPUFeatures::arm_version();
   if ((version == ARMv5TE) || (version == ARMv6)) {
     const uint32_t byte0 = (target_address & 0x000000ff);
     const uint32_t byte1 = (target_address & 0x0000ff00) >> 8;
     const uint32_t byte2 = (target_address & 0x00ff0000) >> 16;
@@ skipping 151 matching lines @@
   } else {
     ASSERT(version == ARMv7);
     return bx_lr->InstructionBits() == instruction;
   }
   return false;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM