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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
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1568 if (object.IsSmi()) { | 1568 if (object.IsSmi()) { |
1569 LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()), cond); | 1569 LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()), cond); |
1570 } else if (object.InVMHeap() || !allow_constant_pool()) { | 1570 } else if (object.InVMHeap() || !allow_constant_pool()) { |
1571 // Make sure that class CallPattern is able to decode this load immediate. | 1571 // Make sure that class CallPattern is able to decode this load immediate. |
1572 const int32_t object_raw = reinterpret_cast<int32_t>(object.raw()); | 1572 const int32_t object_raw = reinterpret_cast<int32_t>(object.raw()); |
1573 LoadImmediate(rd, object_raw, cond); | 1573 LoadImmediate(rd, object_raw, cond); |
1574 } else { | 1574 } else { |
1575 // Make sure that class CallPattern is able to decode this load from the | 1575 // Make sure that class CallPattern is able to decode this load from the |
1576 // object pool. | 1576 // object pool. |
1577 const int32_t offset = | 1577 const int32_t offset = |
1578 Array::element_offset(object_pool_.FindObject(object, kNotPatchable)); | 1578 ObjectPool::element_offset(object_pool_.FindObject(object)); |
1579 LoadWordFromPoolOffset(rd, offset - kHeapObjectTag, cond); | 1579 LoadWordFromPoolOffset(rd, offset - kHeapObjectTag, cond); |
1580 } | 1580 } |
1581 } | 1581 } |
1582 | 1582 |
1583 | 1583 |
1584 void Assembler::PushObject(const Object& object) { | 1584 void Assembler::PushObject(const Object& object) { |
1585 LoadObject(IP, object); | 1585 LoadObject(IP, object); |
1586 Push(IP); | 1586 Push(IP); |
1587 } | 1587 } |
1588 | 1588 |
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2653 LoadImmediate(LR, label->address()); // Target address is never patched. | 2653 LoadImmediate(LR, label->address()); // Target address is never patched. |
2654 blx(LR); // Use blx instruction so that the return branch prediction works. | 2654 blx(LR); // Use blx instruction so that the return branch prediction works. |
2655 } | 2655 } |
2656 | 2656 |
2657 | 2657 |
2658 void Assembler::BranchLinkPatchable(const ExternalLabel* label) { | 2658 void Assembler::BranchLinkPatchable(const ExternalLabel* label) { |
2659 // Make sure that class CallPattern is able to patch the label referred | 2659 // Make sure that class CallPattern is able to patch the label referred |
2660 // to by this code sequence. | 2660 // to by this code sequence. |
2661 // For added code robustness, use 'blx lr' in a patchable sequence and | 2661 // For added code robustness, use 'blx lr' in a patchable sequence and |
2662 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors). | 2662 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors). |
2663 const int32_t offset = | 2663 const int32_t offset = ObjectPool::element_offset( |
2664 Array::element_offset(object_pool_.FindExternalLabel(label, kPatchable)); | 2664 object_pool_. |
2665 FindExternalLabel(label, kPatchable)); | |
srdjan
2015/06/09 21:49:46
Should fit on two instead of three lines.
Florian Schneider
2015/06/10 08:26:17
Done.
| |
2665 LoadWordFromPoolOffset(LR, offset - kHeapObjectTag); | 2666 LoadWordFromPoolOffset(LR, offset - kHeapObjectTag); |
2666 blx(LR); // Use blx instruction so that the return branch prediction works. | 2667 blx(LR); // Use blx instruction so that the return branch prediction works. |
2667 } | 2668 } |
2668 | 2669 |
2669 | 2670 |
2670 void Assembler::BranchLinkOffset(Register base, int32_t offset) { | 2671 void Assembler::BranchLinkOffset(Register base, int32_t offset) { |
2671 ASSERT(base != PC); | 2672 ASSERT(base != PC); |
2672 ASSERT(base != IP); | 2673 ASSERT(base != IP); |
2673 LoadFromOffset(kWord, IP, base, offset); | 2674 LoadFromOffset(kWord, IP, base, offset); |
2674 blx(IP); // Use blx instruction so that the return branch prediction works. | 2675 blx(IP); // Use blx instruction so that the return branch prediction works. |
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3569 | 3570 |
3570 | 3571 |
3571 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3572 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
3572 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3573 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
3573 return fpu_reg_names[reg]; | 3574 return fpu_reg_names[reg]; |
3574 } | 3575 } |
3575 | 3576 |
3576 } // namespace dart | 3577 } // namespace dart |
3577 | 3578 |
3578 #endif // defined TARGET_ARCH_ARM | 3579 #endif // defined TARGET_ARCH_ARM |
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