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Issue 1174173007: Expand the class id to 32 bits and size field to 16 bits on 64-bit platforms. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 5 years, 6 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_X64. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_X64.
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "vm/dart_entry.h" 10 #include "vm/dart_entry.h"
(...skipping 1420 matching lines...) Expand 10 before | Expand all | Expand 10 after
1431 for (intptr_t i = 0; i < num_temps; i++) { 1431 for (intptr_t i = 0; i < num_temps; i++) {
1432 summary->set_temp(i, Location::RequiresRegister()); 1432 summary->set_temp(i, Location::RequiresRegister());
1433 } 1433 }
1434 1434
1435 1435
1436 return summary; 1436 return summary;
1437 } 1437 }
1438 1438
1439 1439
1440 void GuardFieldClassInstr::EmitNativeCode(FlowGraphCompiler* compiler) { 1440 void GuardFieldClassInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
1441 ASSERT(sizeof(classid_t) == 4);
siva 2015/06/12 22:08:11 Ditto here.
1441 const intptr_t value_cid = value()->Type()->ToCid(); 1442 const intptr_t value_cid = value()->Type()->ToCid();
1442 const intptr_t field_cid = field().guarded_cid(); 1443 const intptr_t field_cid = field().guarded_cid();
1443 const intptr_t nullability = field().is_nullable() ? kNullCid : kIllegalCid; 1444 const intptr_t nullability = field().is_nullable() ? kNullCid : kIllegalCid;
1444 1445
1445 if (field_cid == kDynamicCid) { 1446 if (field_cid == kDynamicCid) {
1446 ASSERT(!compiler->is_optimizing()); 1447 ASSERT(!compiler->is_optimizing());
1447 return; // Nothing to emit. 1448 return; // Nothing to emit.
1448 } 1449 }
1449 1450
1450 const bool emit_full_guard = 1451 const bool emit_full_guard =
(...skipping 22 matching lines...) Expand all
1473 if (emit_full_guard) { 1474 if (emit_full_guard) {
1474 __ LoadObject(field_reg, Field::ZoneHandle(field().raw()), PP); 1475 __ LoadObject(field_reg, Field::ZoneHandle(field().raw()), PP);
1475 1476
1476 FieldAddress field_cid_operand(field_reg, Field::guarded_cid_offset()); 1477 FieldAddress field_cid_operand(field_reg, Field::guarded_cid_offset());
1477 FieldAddress field_nullability_operand( 1478 FieldAddress field_nullability_operand(
1478 field_reg, Field::is_nullable_offset()); 1479 field_reg, Field::is_nullable_offset());
1479 1480
1480 if (value_cid == kDynamicCid) { 1481 if (value_cid == kDynamicCid) {
1481 LoadValueCid(compiler, value_cid_reg, value_reg); 1482 LoadValueCid(compiler, value_cid_reg, value_reg);
1482 1483
1483 __ cmpw(value_cid_reg, field_cid_operand); 1484 __ cmpl(value_cid_reg, field_cid_operand);
1484 __ j(EQUAL, &ok); 1485 __ j(EQUAL, &ok);
1485 __ cmpw(value_cid_reg, field_nullability_operand); 1486 __ cmpl(value_cid_reg, field_nullability_operand);
1486 } else if (value_cid == kNullCid) { 1487 } else if (value_cid == kNullCid) {
1487 __ cmpw(field_nullability_operand, Immediate(value_cid)); 1488 __ cmpl(field_nullability_operand, Immediate(value_cid));
1488 } else { 1489 } else {
1489 __ cmpw(field_cid_operand, Immediate(value_cid)); 1490 __ cmpl(field_cid_operand, Immediate(value_cid));
1490 } 1491 }
1491 __ j(EQUAL, &ok); 1492 __ j(EQUAL, &ok);
1492 1493
1493 // Check if the tracked state of the guarded field can be initialized 1494 // Check if the tracked state of the guarded field can be initialized
1494 // inline. If the field needs length check we fall through to runtime 1495 // inline. If the field needs length check we fall through to runtime
1495 // which is responsible for computing offset of the length field 1496 // which is responsible for computing offset of the length field
1496 // based on the class id. 1497 // based on the class id.
1497 if (!field().needs_length_check()) { 1498 if (!field().needs_length_check()) {
1498 // Uninitialized field can be handled inline. Check if the 1499 // Uninitialized field can be handled inline. Check if the
1499 // field is still unitialized. 1500 // field is still unitialized.
1500 __ cmpw(field_cid_operand, Immediate(kIllegalCid)); 1501 __ cmpl(field_cid_operand, Immediate(kIllegalCid));
1501 __ j(NOT_EQUAL, fail); 1502 __ j(NOT_EQUAL, fail);
1502 1503
1503 if (value_cid == kDynamicCid) { 1504 if (value_cid == kDynamicCid) {
1504 __ movw(field_cid_operand, value_cid_reg); 1505 __ movl(field_cid_operand, value_cid_reg);
1505 __ movw(field_nullability_operand, value_cid_reg); 1506 __ movl(field_nullability_operand, value_cid_reg);
1506 } else { 1507 } else {
1507 ASSERT(field_reg != kNoRegister); 1508 ASSERT(field_reg != kNoRegister);
1508 __ movw(field_cid_operand, Immediate(value_cid)); 1509 __ movl(field_cid_operand, Immediate(value_cid));
1509 __ movw(field_nullability_operand, Immediate(value_cid)); 1510 __ movl(field_nullability_operand, Immediate(value_cid));
1510 } 1511 }
1511 1512
1512 if (deopt == NULL) { 1513 if (deopt == NULL) {
1513 ASSERT(!compiler->is_optimizing()); 1514 ASSERT(!compiler->is_optimizing());
1514 __ jmp(&ok); 1515 __ jmp(&ok);
1515 } 1516 }
1516 } 1517 }
1517 1518
1518 if (deopt == NULL) { 1519 if (deopt == NULL) {
1519 ASSERT(!compiler->is_optimizing()); 1520 ASSERT(!compiler->is_optimizing());
1520 __ Bind(fail); 1521 __ Bind(fail);
1521 1522
1522 __ cmpw(FieldAddress(field_reg, Field::guarded_cid_offset()), 1523 __ cmpl(FieldAddress(field_reg, Field::guarded_cid_offset()),
1523 Immediate(kDynamicCid)); 1524 Immediate(kDynamicCid));
1524 __ j(EQUAL, &ok); 1525 __ j(EQUAL, &ok);
1525 1526
1526 __ pushq(field_reg); 1527 __ pushq(field_reg);
1527 __ pushq(value_reg); 1528 __ pushq(value_reg);
1528 __ CallRuntime(kUpdateFieldCidRuntimeEntry, 2); 1529 __ CallRuntime(kUpdateFieldCidRuntimeEntry, 2);
1529 __ Drop(2); // Drop the field and the value. 1530 __ Drop(2); // Drop the field and the value.
1530 } 1531 }
1531 } else { 1532 } else {
1532 ASSERT(compiler->is_optimizing()); 1533 ASSERT(compiler->is_optimizing());
(...skipping 230 matching lines...) Expand 10 before | Expand all | Expand 10 after
1763 __ movq(temp, box_reg); 1764 __ movq(temp, box_reg);
1764 __ StoreIntoObject(instance_reg, 1765 __ StoreIntoObject(instance_reg,
1765 FieldAddress(instance_reg, offset), 1766 FieldAddress(instance_reg, offset),
1766 temp); 1767 temp);
1767 1768
1768 __ Bind(&done); 1769 __ Bind(&done);
1769 } 1770 }
1770 1771
1771 1772
1772 void StoreInstanceFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) { 1773 void StoreInstanceFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
1774 ASSERT(sizeof(classid_t) == 4);
1773 Label skip_store; 1775 Label skip_store;
1774 1776
1775 Register instance_reg = locs()->in(0).reg(); 1777 Register instance_reg = locs()->in(0).reg();
1776 1778
1777 if (IsUnboxedStore() && compiler->is_optimizing()) { 1779 if (IsUnboxedStore() && compiler->is_optimizing()) {
1778 XmmRegister value = locs()->in(1).fpu_reg(); 1780 XmmRegister value = locs()->in(1).fpu_reg();
1779 Register temp = locs()->temp(0).reg(); 1781 Register temp = locs()->temp(0).reg();
1780 Register temp2 = locs()->temp(1).reg(); 1782 Register temp2 = locs()->temp(1).reg();
1781 const intptr_t cid = field().UnboxedFieldCid(); 1783 const intptr_t cid = field().UnboxedFieldCid();
1782 1784
(...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after
1835 locs()->live_registers()->Add(locs()->in(1), kTagged); 1837 locs()->live_registers()->Add(locs()->in(1), kTagged);
1836 } 1838 }
1837 1839
1838 Label store_pointer; 1840 Label store_pointer;
1839 Label store_double; 1841 Label store_double;
1840 Label store_float32x4; 1842 Label store_float32x4;
1841 Label store_float64x2; 1843 Label store_float64x2;
1842 1844
1843 __ LoadObject(temp, Field::ZoneHandle(field().raw()), PP); 1845 __ LoadObject(temp, Field::ZoneHandle(field().raw()), PP);
1844 1846
1845 __ cmpw(FieldAddress(temp, Field::is_nullable_offset()), 1847 __ cmpl(FieldAddress(temp, Field::is_nullable_offset()),
1846 Immediate(kNullCid)); 1848 Immediate(kNullCid));
1847 __ j(EQUAL, &store_pointer); 1849 __ j(EQUAL, &store_pointer);
1848 1850
1849 __ movzxb(temp2, FieldAddress(temp, Field::kind_bits_offset())); 1851 __ movzxb(temp2, FieldAddress(temp, Field::kind_bits_offset()));
1850 __ testq(temp2, Immediate(1 << Field::kUnboxingCandidateBit)); 1852 __ testq(temp2, Immediate(1 << Field::kUnboxingCandidateBit));
1851 __ j(ZERO, &store_pointer); 1853 __ j(ZERO, &store_pointer);
1852 1854
1853 __ cmpw(FieldAddress(temp, Field::guarded_cid_offset()), 1855 __ cmpl(FieldAddress(temp, Field::guarded_cid_offset()),
1854 Immediate(kDoubleCid)); 1856 Immediate(kDoubleCid));
1855 __ j(EQUAL, &store_double); 1857 __ j(EQUAL, &store_double);
1856 1858
1857 __ cmpw(FieldAddress(temp, Field::guarded_cid_offset()), 1859 __ cmpl(FieldAddress(temp, Field::guarded_cid_offset()),
1858 Immediate(kFloat32x4Cid)); 1860 Immediate(kFloat32x4Cid));
1859 __ j(EQUAL, &store_float32x4); 1861 __ j(EQUAL, &store_float32x4);
1860 1862
1861 __ cmpw(FieldAddress(temp, Field::guarded_cid_offset()), 1863 __ cmpl(FieldAddress(temp, Field::guarded_cid_offset()),
1862 Immediate(kFloat64x2Cid)); 1864 Immediate(kFloat64x2Cid));
1863 __ j(EQUAL, &store_float64x2); 1865 __ j(EQUAL, &store_float64x2);
1864 1866
1865 // Fall through. 1867 // Fall through.
1866 __ jmp(&store_pointer); 1868 __ jmp(&store_pointer);
1867 1869
1868 if (!compiler->is_optimizing()) { 1870 if (!compiler->is_optimizing()) {
1869 locs()->live_registers()->Add(locs()->in(0)); 1871 locs()->live_registers()->Add(locs()->in(0));
1870 locs()->live_registers()->Add(locs()->in(1)); 1872 locs()->live_registers()->Add(locs()->in(1));
1871 } 1873 }
(...skipping 285 matching lines...) Expand 10 before | Expand all | Expand 10 after
2157 locs->set_temp(0, opt ? Location::RequiresFpuRegister() 2159 locs->set_temp(0, opt ? Location::RequiresFpuRegister()
2158 : Location::FpuRegisterLocation(XMM1)); 2160 : Location::FpuRegisterLocation(XMM1));
2159 locs->set_temp(1, Location::RequiresRegister()); 2161 locs->set_temp(1, Location::RequiresRegister());
2160 } 2162 }
2161 locs->set_out(0, Location::RequiresRegister()); 2163 locs->set_out(0, Location::RequiresRegister());
2162 return locs; 2164 return locs;
2163 } 2165 }
2164 2166
2165 2167
2166 void LoadFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) { 2168 void LoadFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
2169 ASSERT(sizeof(classid_t) == 4);
2167 Register instance_reg = locs()->in(0).reg(); 2170 Register instance_reg = locs()->in(0).reg();
2168 if (IsUnboxedLoad() && compiler->is_optimizing()) { 2171 if (IsUnboxedLoad() && compiler->is_optimizing()) {
2169 XmmRegister result = locs()->out(0).fpu_reg(); 2172 XmmRegister result = locs()->out(0).fpu_reg();
2170 Register temp = locs()->temp(0).reg(); 2173 Register temp = locs()->temp(0).reg();
2171 __ movq(temp, FieldAddress(instance_reg, offset_in_bytes())); 2174 __ movq(temp, FieldAddress(instance_reg, offset_in_bytes()));
2172 intptr_t cid = field()->UnboxedFieldCid(); 2175 intptr_t cid = field()->UnboxedFieldCid();
2173 switch (cid) { 2176 switch (cid) {
2174 case kDoubleCid: 2177 case kDoubleCid:
2175 __ Comment("UnboxedDoubleLoadFieldInstr"); 2178 __ Comment("UnboxedDoubleLoadFieldInstr");
2176 __ movsd(result, FieldAddress(temp, Double::value_offset())); 2179 __ movsd(result, FieldAddress(temp, Double::value_offset()));
(...skipping 18 matching lines...) Expand all
2195 Register temp = locs()->temp(1).reg(); 2198 Register temp = locs()->temp(1).reg();
2196 XmmRegister value = locs()->temp(0).fpu_reg(); 2199 XmmRegister value = locs()->temp(0).fpu_reg();
2197 2200
2198 Label load_pointer; 2201 Label load_pointer;
2199 Label load_double; 2202 Label load_double;
2200 Label load_float32x4; 2203 Label load_float32x4;
2201 Label load_float64x2; 2204 Label load_float64x2;
2202 2205
2203 __ LoadObject(result, Field::ZoneHandle(field()->raw()), PP); 2206 __ LoadObject(result, Field::ZoneHandle(field()->raw()), PP);
2204 2207
2205 __ cmpw(FieldAddress(result, Field::is_nullable_offset()), 2208 __ cmpl(FieldAddress(result, Field::is_nullable_offset()),
2206 Immediate(kNullCid)); 2209 Immediate(kNullCid));
2207 __ j(EQUAL, &load_pointer); 2210 __ j(EQUAL, &load_pointer);
2208 2211
2209 __ cmpw(FieldAddress(result, Field::guarded_cid_offset()), 2212 __ cmpl(FieldAddress(result, Field::guarded_cid_offset()),
2210 Immediate(kDoubleCid)); 2213 Immediate(kDoubleCid));
2211 __ j(EQUAL, &load_double); 2214 __ j(EQUAL, &load_double);
2212 2215
2213 __ cmpw(FieldAddress(result, Field::guarded_cid_offset()), 2216 __ cmpl(FieldAddress(result, Field::guarded_cid_offset()),
2214 Immediate(kFloat32x4Cid)); 2217 Immediate(kFloat32x4Cid));
2215 __ j(EQUAL, &load_float32x4); 2218 __ j(EQUAL, &load_float32x4);
2216 2219
2217 __ cmpw(FieldAddress(result, Field::guarded_cid_offset()), 2220 __ cmpl(FieldAddress(result, Field::guarded_cid_offset()),
2218 Immediate(kFloat64x2Cid)); 2221 Immediate(kFloat64x2Cid));
2219 __ j(EQUAL, &load_float64x2); 2222 __ j(EQUAL, &load_float64x2);
2220 2223
2221 // Fall through. 2224 // Fall through.
2222 __ jmp(&load_pointer); 2225 __ jmp(&load_pointer);
2223 2226
2224 if (!compiler->is_optimizing()) { 2227 if (!compiler->is_optimizing()) {
2225 locs()->live_registers()->Add(locs()->in(0)); 2228 locs()->live_registers()->Add(locs()->in(0));
2226 } 2229 }
2227 2230
(...skipping 4230 matching lines...) Expand 10 before | Expand all | Expand 10 after
6458 __ Drop(1); 6461 __ Drop(1);
6459 __ popq(result); 6462 __ popq(result);
6460 } 6463 }
6461 6464
6462 6465
6463 } // namespace dart 6466 } // namespace dart
6464 6467
6465 #undef __ 6468 #undef __
6466 6469
6467 #endif // defined TARGET_ARCH_X64 6470 #endif // defined TARGET_ARCH_X64
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