Expand the class id to 32 bits and size field to 16 bits on 64-bit platforms.

runtime/vm/intermediate_language_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intermediate_language.h"
 
 #include "vm/dart_entry.h"
@@ skipping 1588 matching lines @@
 
   for (intptr_t i = 0; i < num_temps; i++) {
     summary->set_temp(i, Location::RequiresRegister());
   }
 
   return summary;
 }
 
 
 void GuardFieldClassInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  ASSERT(sizeof(classid_t) == 2);

[siva, 2015/06/12 22:08:11]

Ditto.

   __ Comment("GuardFieldClassInstr");
 
   const intptr_t value_cid = value()->Type()->ToCid();
   const intptr_t field_cid = field().guarded_cid();
   const intptr_t nullability = field().is_nullable() ? kNullCid : kIllegalCid;
 
   if (field_cid == kDynamicCid) {
     ASSERT(!compiler->is_optimizing());
     return;  // Nothing to emit.
   }
@@ skipping 321 matching lines @@
   __ lw(box_reg, FieldAddress(instance_reg, offset));
   __ BranchNotEqual(box_reg, Object::null_object(), &done);
   BoxAllocationSlowPath::Allocate(compiler, instruction, cls, box_reg, temp);
   __ mov(temp, box_reg);
   __ StoreIntoObjectOffset(instance_reg, offset, temp);
   __ Bind(&done);
 }
 
 
 void StoreInstanceFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  ASSERT(sizeof(classid_t) == 2);
   Label skip_store;
 
   Register instance_reg = locs()->in(0).reg();
 
   if (IsUnboxedStore() && compiler->is_optimizing()) {
     DRegister value = locs()->in(1).fpu_reg();
     Register temp = locs()->temp(0).reg();
     Register temp2 = locs()->temp(1).reg();
     const intptr_t cid = field().UnboxedFieldCid();
 
@@ skipping 318 matching lines @@
     locs->set_temp(0, opt ? Location::RequiresFpuRegister()
                           : Location::FpuRegisterLocation(D1));
     locs->set_temp(1, Location::RequiresRegister());
   }
   locs->set_out(0, Location::RequiresRegister());
   return locs;
 }
 
 
 void LoadFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  ASSERT(sizeof(classid_t) == 2);
+
   Register instance_reg = locs()->in(0).reg();
   if (IsUnboxedLoad() && compiler->is_optimizing()) {
     DRegister result = locs()->out(0).fpu_reg();
     Register temp = locs()->temp(0).reg();
     __ lw(temp, FieldAddress(instance_reg, offset_in_bytes()));
     intptr_t cid = field()->UnboxedFieldCid();
     switch (cid) {
       case kDoubleCid:
         __ LoadDFromOffset(result, temp,
                            Double::value_offset() - kHeapObjectTag);
@@ skipping 3324 matching lines @@
                                 1,
                                 locs());
   __ lw(result, Address(SP, 1 * kWordSize));
   __ addiu(SP, SP, Immediate(2 * kWordSize));
 }
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS