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| 1 /* |
| 2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved. |
| 3 * |
| 4 * Use of this source code is governed by a BSD-style license |
| 5 * that can be found in the LICENSE file in the root of the source |
| 6 * tree. An additional intellectual property rights grant can be found |
| 7 * in the file PATENTS. All contributing project authors may |
| 8 * be found in the AUTHORS file in the root of the source tree. |
| 9 */ |
| 10 |
| 11 #include <assert.h> |
| 12 #include "vp9/common/mips/msa/vp9_idct_msa.h" |
| 13 |
| 14 void vp9_iwht4x4_16_add_msa(const int16_t *input, uint8_t *dst, |
| 15 int32_t dst_stride) { |
| 16 v8i16 in0, in1, in2, in3; |
| 17 v4i32 in0_r, in1_r, in2_r, in3_r, in4_r; |
| 18 |
| 19 /* load vector elements of 4x4 block */ |
| 20 LD4x4_SH(input, in0, in2, in3, in1); |
| 21 TRANSPOSE4x4_SH_SH(in0, in2, in3, in1, in0, in2, in3, in1); |
| 22 UNPCK_R_SH_SW(in0, in0_r); |
| 23 UNPCK_R_SH_SW(in2, in2_r); |
| 24 UNPCK_R_SH_SW(in3, in3_r); |
| 25 UNPCK_R_SH_SW(in1, in1_r); |
| 26 SRA_4V(in0_r, in1_r, in2_r, in3_r, UNIT_QUANT_SHIFT); |
| 27 |
| 28 in0_r += in2_r; |
| 29 in3_r -= in1_r; |
| 30 in4_r = (in0_r - in3_r) >> 1; |
| 31 in1_r = in4_r - in1_r; |
| 32 in2_r = in4_r - in2_r; |
| 33 in0_r -= in1_r; |
| 34 in3_r += in2_r; |
| 35 |
| 36 TRANSPOSE4x4_SW_SW(in0_r, in1_r, in2_r, in3_r, in0_r, in1_r, in2_r, in3_r); |
| 37 |
| 38 in0_r += in1_r; |
| 39 in2_r -= in3_r; |
| 40 in4_r = (in0_r - in2_r) >> 1; |
| 41 in3_r = in4_r - in3_r; |
| 42 in1_r = in4_r - in1_r; |
| 43 in0_r -= in3_r; |
| 44 in2_r += in1_r; |
| 45 |
| 46 PCKEV_H4_SH(in0_r, in0_r, in1_r, in1_r, in2_r, in2_r, in3_r, in3_r, |
| 47 in0, in1, in2, in3); |
| 48 ADDBLK_ST4x4_UB(in0, in3, in1, in2, dst, dst_stride); |
| 49 } |
| 50 |
| 51 void vp9_iwht4x4_1_add_msa(const int16_t *input, uint8_t *dst, |
| 52 int32_t dst_stride) { |
| 53 int16_t a1, e1; |
| 54 v8i16 in1, in0 = { 0 }; |
| 55 |
| 56 a1 = input[0] >> UNIT_QUANT_SHIFT; |
| 57 e1 = a1 >> 1; |
| 58 a1 -= e1; |
| 59 |
| 60 in0 = __msa_insert_h(in0, 0, a1); |
| 61 in0 = __msa_insert_h(in0, 1, e1); |
| 62 in0 = __msa_insert_h(in0, 2, e1); |
| 63 in0 = __msa_insert_h(in0, 3, e1); |
| 64 |
| 65 in1 = in0 >> 1; |
| 66 in0 -= in1; |
| 67 |
| 68 ADDBLK_ST4x4_UB(in0, in1, in1, in1, dst, dst_stride); |
| 69 } |
| 70 |
| 71 void vp9_idct4x4_16_add_msa(const int16_t *input, uint8_t *dst, |
| 72 int32_t dst_stride) { |
| 73 v8i16 in0, in1, in2, in3; |
| 74 |
| 75 /* load vector elements of 4x4 block */ |
| 76 LD4x4_SH(input, in0, in1, in2, in3); |
| 77 /* rows */ |
| 78 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 79 VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 80 /* columns */ |
| 81 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 82 VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 83 /* rounding (add 2^3, divide by 2^4) */ |
| 84 SRARI_H4_SH(in0, in1, in2, in3, 4); |
| 85 ADDBLK_ST4x4_UB(in0, in1, in2, in3, dst, dst_stride); |
| 86 } |
| 87 |
| 88 void vp9_idct4x4_1_add_msa(const int16_t *input, uint8_t *dst, |
| 89 int32_t dst_stride) { |
| 90 int16_t out; |
| 91 v8i16 vec; |
| 92 |
| 93 out = ROUND_POWER_OF_TWO((input[0] * cospi_16_64), DCT_CONST_BITS); |
| 94 out = ROUND_POWER_OF_TWO((out * cospi_16_64), DCT_CONST_BITS); |
| 95 out = ROUND_POWER_OF_TWO(out, 4); |
| 96 vec = __msa_fill_h(out); |
| 97 |
| 98 ADDBLK_ST4x4_UB(vec, vec, vec, vec, dst, dst_stride); |
| 99 } |
| 100 |
| 101 void vp9_iht4x4_16_add_msa(const int16_t *input, uint8_t *dst, |
| 102 int32_t dst_stride, int32_t tx_type) { |
| 103 v8i16 in0, in1, in2, in3; |
| 104 |
| 105 /* load vector elements of 4x4 block */ |
| 106 LD4x4_SH(input, in0, in1, in2, in3); |
| 107 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 108 |
| 109 switch (tx_type) { |
| 110 case DCT_DCT: |
| 111 /* DCT in horizontal */ |
| 112 VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 113 /* DCT in vertical */ |
| 114 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 115 VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 116 break; |
| 117 case ADST_DCT: |
| 118 /* DCT in horizontal */ |
| 119 VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 120 /* ADST in vertical */ |
| 121 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 122 VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 123 break; |
| 124 case DCT_ADST: |
| 125 /* ADST in horizontal */ |
| 126 VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 127 /* DCT in vertical */ |
| 128 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 129 VP9_IDCT4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 130 break; |
| 131 case ADST_ADST: |
| 132 /* ADST in horizontal */ |
| 133 VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 134 /* ADST in vertical */ |
| 135 TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3); |
| 136 VP9_IADST4x4(in0, in1, in2, in3, in0, in1, in2, in3); |
| 137 break; |
| 138 default: |
| 139 assert(0); |
| 140 break; |
| 141 } |
| 142 |
| 143 /* final rounding (add 2^3, divide by 2^4) and shift */ |
| 144 SRARI_H4_SH(in0, in1, in2, in3, 4); |
| 145 /* add block and store 4x4 */ |
| 146 ADDBLK_ST4x4_UB(in0, in1, in2, in3, dst, dst_stride); |
| 147 } |
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