First patch for Mips subzero compiler

src/IceRegistersMIPS32.h

Index: src/IceRegistersMIPS32.h
diff --git a/src/IceRegistersARM32.h b/src/IceRegistersMIPS32.h
similarity index 78%
copy from src/IceRegistersARM32.h
copy to src/IceRegistersMIPS32.h
index 2ad1c8b36adef2dfb57836cd13efb255f2b47347..d2180bf4fd129ee43a3384e4827e3714641f0916 100644
--- a/src/IceRegistersARM32.h
+++ b/src/IceRegistersMIPS32.h
@@ -1,4 +1,4 @@
-//===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
+//===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
@@ -7,20 +7,20 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file declares the registers and their encodings for ARM32.
+// This file declares the registers and their encodings for MIPS32.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef SUBZERO_SRC_ICEREGISTERSARM32_H
-#define SUBZERO_SRC_ICEREGISTERSARM32_H
+#ifndef SUBZERO_SRC_ICEREGISTERSMIPS32_H
+#define SUBZERO_SRC_ICEREGISTERSMIPS32_H
 
 #include "IceDefs.h"
-#include "IceInstARM32.def"
+#include "IceInstMIPS32.def"
 #include "IceTypes.h"
 
 namespace Ice {
 
-namespace RegARM32 {
+namespace RegMIPS32 {
 
 // An enum of every register. The enum value may not match the encoding
 // used to binary encode register operands in instructions.
@@ -28,11 +28,11 @@ enum AllRegisters {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isFP)                                                                \
   val,
-  REGARM32_TABLE
+  REGMIPS32_TABLE
 #undef X
       Reg_NUM,
 #define X(val, init) val init,
-  REGARM32_TABLE_BOUNDS
+  REGMIPS32_TABLE_BOUNDS
 #undef X
 };
 
@@ -42,7 +42,7 @@ enum GPRRegister {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isFP)                                                                \
   Encoded_##val encode,
-  REGARM32_GPR_TABLE
+  REGMIPS32_GPR_TABLE
 #undef X
       Encoded_Not_GPR = -1
 };
@@ -55,8 +55,8 @@ static inline GPRRegister getEncodedGPR(int32_t RegNum) {
   return GPRRegister(RegNum - Reg_GPR_First);
 }
 
-} // end of namespace RegARM32
+} // end of namespace RegMIPS32
 
 } // end of namespace Ice
 
-#endif // SUBZERO_SRC_ICEREGISTERSARM32_H
+#endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H