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| 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
| 2 // |
| 3 // The Subzero Code Generator |
| 4 // |
| 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. |
| 7 // |
| 8 //===----------------------------------------------------------------------===// |
| 9 // |
| 10 // This file declares the TargetLoweringMIPS32 class, which implements the |
| 11 // TargetLowering interface for the MIPS 32-bit architecture. |
| 12 // |
| 13 //===----------------------------------------------------------------------===// |
| 14 |
| 15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
| 16 #define SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
| 17 |
| 18 #include "IceDefs.h" |
| 19 #include "IceInstMIPS32.h" |
| 20 #include "IceRegistersMIPS32.h" |
| 21 #include "IceTargetLowering.h" |
| 22 |
| 23 namespace Ice { |
| 24 |
| 25 class TargetMIPS32 : public TargetLowering { |
| 26 TargetMIPS32() = delete; |
| 27 TargetMIPS32(const TargetMIPS32 &) = delete; |
| 28 TargetMIPS32 &operator=(const TargetMIPS32 &) = delete; |
| 29 |
| 30 public: |
| 31 // TODO(jvoung): return a unique_ptr. |
| 32 static TargetMIPS32 *create(Cfg *Func) { return new TargetMIPS32(Func); } |
| 33 |
| 34 void translateOm1() override; |
| 35 void translateO2() override; |
| 36 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; |
| 37 |
| 38 SizeT getNumRegisters() const override { return RegMIPS32::Reg_NUM; } |
| 39 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; |
| 40 IceString getRegName(SizeT RegNum, Type Ty) const override; |
| 41 llvm::SmallBitVector getRegisterSet(RegSetMask Include, |
| 42 RegSetMask Exclude) const override; |
| 43 const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const override { |
| 44 return TypeToRegisterSet[Ty]; |
| 45 } |
| 46 bool hasFramePointer() const override { return UsesFramePointer; } |
| 47 SizeT getFrameOrStackReg() const override { |
| 48 return UsesFramePointer ? RegMIPS32::Reg_FP : RegMIPS32::Reg_SP; |
| 49 } |
| 50 size_t typeWidthInBytesOnStack(Type Ty) const override { |
| 51 // Round up to the next multiple of 4 bytes. In particular, i1, |
| 52 // i8, and i16 are rounded up to 4 bytes. |
| 53 return (typeWidthInBytes(Ty) + 3) & ~3; |
| 54 } |
| 55 void emitVariable(const Variable *Var) const override; |
| 56 |
| 57 const char *getConstantPrefix() const final { return ""; } |
| 58 void emit(const ConstantUndef *C) const final { |
| 59 llvm::report_fatal_error("Not yet implemented"); |
| 60 } |
| 61 void emit(const ConstantInteger32 *C) const final { |
| 62 llvm::report_fatal_error("Not yet implemented"); |
| 63 } |
| 64 void emit(const ConstantInteger64 *C) const final { |
| 65 llvm::report_fatal_error("Not yet implemented"); |
| 66 } |
| 67 void emit(const ConstantFloat *C) const final { |
| 68 llvm::report_fatal_error("Not yet implemented"); |
| 69 } |
| 70 void emit(const ConstantDouble *C) const final { |
| 71 llvm::report_fatal_error("Not yet implemented"); |
| 72 } |
| 73 |
| 74 void lowerArguments() override; |
| 75 void addProlog(CfgNode *Node) override; |
| 76 void addEpilog(CfgNode *Node) override; |
| 77 |
| 78 protected: |
| 79 explicit TargetMIPS32(Cfg *Func); |
| 80 |
| 81 void postLower() override; |
| 82 |
| 83 void lowerAlloca(const InstAlloca *Inst) override; |
| 84 void lowerArithmetic(const InstArithmetic *Inst) override; |
| 85 void lowerAssign(const InstAssign *Inst) override; |
| 86 void lowerBr(const InstBr *Inst) override; |
| 87 void lowerCall(const InstCall *Inst) override; |
| 88 void lowerCast(const InstCast *Inst) override; |
| 89 void lowerExtractElement(const InstExtractElement *Inst) override; |
| 90 void lowerFcmp(const InstFcmp *Inst) override; |
| 91 void lowerIcmp(const InstIcmp *Inst) override; |
| 92 void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override; |
| 93 void lowerInsertElement(const InstInsertElement *Inst) override; |
| 94 void lowerLoad(const InstLoad *Inst) override; |
| 95 void lowerPhi(const InstPhi *Inst) override; |
| 96 void lowerRet(const InstRet *Inst) override; |
| 97 void lowerSelect(const InstSelect *Inst) override; |
| 98 void lowerStore(const InstStore *Inst) override; |
| 99 void lowerSwitch(const InstSwitch *Inst) override; |
| 100 void lowerUnreachable(const InstUnreachable *Inst) override; |
| 101 void prelowerPhis() override; |
| 102 void lowerPhiAssignments(CfgNode *Node, |
| 103 const AssignList &Assignments) override; |
| 104 void doAddressOptLoad() override; |
| 105 void doAddressOptStore() override; |
| 106 void randomlyInsertNop(float Probability) override; |
| 107 void makeRandomRegisterPermutation( |
| 108 llvm::SmallVectorImpl<int32_t> &Permutation, |
| 109 const llvm::SmallBitVector &ExcludeRegisters) const override; |
| 110 |
| 111 static Type stackSlotType(); |
| 112 |
| 113 bool UsesFramePointer; |
| 114 bool NeedsStackAlignment; |
| 115 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; |
| 116 llvm::SmallBitVector ScratchRegs; |
| 117 llvm::SmallBitVector RegsUsed; |
| 118 VarList PhysicalRegisters[IceType_NUM]; |
| 119 static IceString RegNames[]; |
| 120 |
| 121 private: |
| 122 ~TargetMIPS32() override {} |
| 123 }; |
| 124 |
| 125 class TargetDataMIPS32 : public TargetDataLowering { |
| 126 TargetDataMIPS32() = delete; |
| 127 TargetDataMIPS32(const TargetDataMIPS32 &) = delete; |
| 128 TargetDataMIPS32 &operator=(const TargetDataMIPS32 &) = delete; |
| 129 |
| 130 public: |
| 131 static TargetDataLowering *create(GlobalContext *Ctx) { |
| 132 return new TargetDataMIPS32(Ctx); |
| 133 } |
| 134 |
| 135 void lowerGlobals(std::unique_ptr<VariableDeclarationList> Vars) const final; |
| 136 void lowerConstants() const final; |
| 137 |
| 138 protected: |
| 139 explicit TargetDataMIPS32(GlobalContext *Ctx); |
| 140 |
| 141 private: |
| 142 void lowerGlobal(const VariableDeclaration &Var) const; |
| 143 ~TargetDataMIPS32() override {} |
| 144 template <typename T> static void emitConstantPool(GlobalContext *Ctx); |
| 145 }; |
| 146 |
| 147 } // end of namespace Ice |
| 148 |
| 149 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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