[MIPS] Do not use pnacl-irt-link for MIPS target.

SConstruct

 #! -*- python -*-
 # Copyright (c) 2012 The Native Client Authors. All rights reserved.
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
 import atexit
 import os
 import platform
 import re
 import subprocess
@@ skipping 3061 matching lines @@
 # ignore the --nacl_glibc, nacl_pic=1 and bitcode=1 switches.
 # We have to reinstantiate the naclsdk.py magic after clearing those flags,
 # so it regenerates the tool paths right.
 # TODO(mcgrathr,bradnelson): could get cleaner if naclsdk.py got folded back in.
 nacl_irt_env.ClearBits('nacl_glibc')
 nacl_irt_env.ClearBits('nacl_pic')
 nacl_irt_env.ClearBits('pnacl_shared_newlib')
 # For x86 systems we build the IRT using the nnacl TC even when
 # the pnacl TC is used otherwise
 if nacl_irt_env.Bit('target_x86_64') or nacl_irt_env.Bit('target_x86_32'):
   nacl_irt_env.ClearBits('bitcode')

[jvoung (off chromium), 2012/12/28 17:21:15]

yeah -- also, arm and mips are the only ones that don't enforce that you use the
gcc toolchain, since chrome is already using the gcc toolchain for x86.

   nacl_irt_env.SetBits('native_code')
 # The irt is not subject to the pexe constraint!
 if nacl_irt_env.Bit('pnacl_generate_pexe'):
   # do not build the irt using the the pexe step
   nacl_irt_env.ClearBits('pnacl_generate_pexe')
 # do not build the irt using the sandboxed translator
 nacl_irt_env.ClearBits('use_sandboxed_translator')
 nacl_irt_env.Tool('naclsdk')
 # These are unfortunately clobbered by running Tool, which
 # we needed to do to get the destination directory reset.
@@ skipping 22 matching lines @@
     nacl_irt_env.Append(CCFLAGS=['--pnacl-frontend-triple=i686-unknown-nacl'])
   elif nacl_irt_env.Bit('target_x86_64'):
     nacl_irt_env.Append(CCFLAGS=['--pnacl-frontend-triple=x86_64-unknown-nacl'])
 
 
 # All IRT code must avoid direct use of the TLS ABI register, which
 # is reserved for user TLS.  Instead, ensure all TLS accesses use a
 # call to __nacl_read_tp, which the IRT code overrides to segregate
 # IRT-private TLS from user TLS.
 if nacl_irt_env.Bit('bitcode'):
-  nacl_irt_env.Append(LINKFLAGS=['--pnacl-allow-native',
-                                 '-Wt,-mtls-use-call',
-                                 '-Wl,--pnacl-irt-link'])
+  nacl_irt_env.Append(LINKFLAGS=['--pnacl-allow-native', '-Wt,-mtls-use-call'])
+  if nacl_irt_env.Bit('target_arm'):
+   nacl_irt_env.Append(LINKFLAGS=['-Wl,--pnacl-irt-link'])

[jvoung (off chromium), 2012/12/28 17:21:15]

The reason we have --pnacl-irt-link, is that the IRT is built with a different
ABI from PNaCl's "le32" ABI.  It's built with the ARM hard float gnueabi ABI on
ARM, for compatibility with GCC.  Then we have the "shim" built by clang to
bridge the le32 ABI with the gcc one, since clang knows about both ABIs and has
the source-level type information to do the ABI matching.

In order to achieve that, the bitcode needs to be biased toward that ABI, so the
bitcode libraries that the IRT uses, like libstdc++, has to be
architecture-biased libraries (not stock le32 bitcode libraries).

Perhaps file an issue and link it to a TODO for ironing out the MIPS ABI.  If we
want compatibility with some future MIPS gcc NaCl port, then I suspect we will
want to do something similar with mips-biased bitcode.  

(1) actually change the IRT build to use the chosen mips abi (like the code on
line 3112).

(2) build biased libraries for mips so that --pnacl-irt-link works.

(3) modify clang a bit to be able to generate the shim that bridges the two
ABIs.


nit: indentation (4 spaces instead of 3?)

[Mark Seaborn, 2012/12/28 18:06:39]

Fix indentation here, then LGTM.

petarj wrote:
Ah yes, of course, that makes sense.

Actually, this is the relevant part (line 3081):

# For x86 systems we build the IRT using the nnacl TC even when
# the pnacl TC is used otherwise
if nacl_irt_env.Bit('target_x86_64') or nacl_irt_env.Bit('target_x86_32'):
  nacl_irt_env.ClearBits('bitcode')

 elif nacl_irt_env.Bit('target_arm'):
   nacl_irt_env.Append(CCFLAGS=['-mtp=soft'])
 else:
   nacl_irt_env.Append(CCFLAGS=['-mtls-use-call'])
 # A debugger should be able to unwind IRT call frames. As the IRT is compiled
 # with high level of optimizations and without debug info, compiler is requested
 # to generate unwind tables explicitly. This is the default behavior on x86-64
 # and when compiling C++ with exceptions enabled, the change is for the benefit
 # of x86-32 C.
 # TODO(eaeltsin): enable unwind tables for ARM
@@ skipping 380 matching lines @@
   nacl_env.ValidateSdk()
 
 if BROKEN_TEST_COUNT > 0:
   msg = "There are %d broken tests." % BROKEN_TEST_COUNT
   if GetOption('brief_comstr'):
     msg += " Add --verbose to the command line for more information."
   print msg
 
 # separate warnings from actual build output
 Banner('B U I L D - O U T P U T:')