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Issue 11684005: Refactor and improve inlined double-aligned allocations (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Review feedback Created 7 years, 11 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1610 // immediately below so this use of ip does not cause difference with 1610 // immediately below so this use of ip does not cause difference with
1611 // respect to register content between debug and release mode. 1611 // respect to register content between debug and release mode.
1612 ldr(ip, MemOperand(topaddr)); 1612 ldr(ip, MemOperand(topaddr));
1613 cmp(result, ip); 1613 cmp(result, ip);
1614 Check(eq, "Unexpected allocation top"); 1614 Check(eq, "Unexpected allocation top");
1615 } 1615 }
1616 // Load allocation limit into ip. Result already contains allocation top. 1616 // Load allocation limit into ip. Result already contains allocation top.
1617 ldr(ip, MemOperand(topaddr, limit - top)); 1617 ldr(ip, MemOperand(topaddr, limit - top));
1618 } 1618 }
1619 1619
1620 if ((flags & DOUBLE_ALIGNMENT) != 0) {
1621 // Align the next allocation. Storing the filler map without checking top is
1622 // always safe because the limit of the heap is always aligned.
1623 ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
1624 and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);
1625 Label aligned;
1626 b(eq, &aligned);
1627 mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
1628 str(scratch2, MemOperand(result, kDoubleSize / 2, PostIndex));
1629 bind(&aligned);
1630 }
1631
1620 // Calculate new top and bail out if new space is exhausted. Use result 1632 // Calculate new top and bail out if new space is exhausted. Use result
1621 // to calculate the new top. 1633 // to calculate the new top.
1622 if (obj_size_operand.is_single_instruction(this)) { 1634 if (obj_size_operand.is_single_instruction(this)) {
1623 // We can add the size as an immediate 1635 // We can add the size as an immediate
1624 add(scratch2, result, obj_size_operand, SetCC); 1636 add(scratch2, result, obj_size_operand, SetCC);
1625 } else { 1637 } else {
1626 // Doesn't fit in an immediate, we have to use the register 1638 // Doesn't fit in an immediate, we have to use the register
1627 add(scratch2, result, obj_size_reg, SetCC); 1639 add(scratch2, result, obj_size_reg, SetCC);
1628 } 1640 }
1629 b(cs, gc_required); 1641 b(cs, gc_required);
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1695 // immediately below so this use of ip does not cause difference with 1707 // immediately below so this use of ip does not cause difference with
1696 // respect to register content between debug and release mode. 1708 // respect to register content between debug and release mode.
1697 ldr(ip, MemOperand(topaddr)); 1709 ldr(ip, MemOperand(topaddr));
1698 cmp(result, ip); 1710 cmp(result, ip);
1699 Check(eq, "Unexpected allocation top"); 1711 Check(eq, "Unexpected allocation top");
1700 } 1712 }
1701 // Load allocation limit into ip. Result already contains allocation top. 1713 // Load allocation limit into ip. Result already contains allocation top.
1702 ldr(ip, MemOperand(topaddr, limit - top)); 1714 ldr(ip, MemOperand(topaddr, limit - top));
1703 } 1715 }
1704 1716
1717 if ((flags & DOUBLE_ALIGNMENT) != 0) {
1718 // Align the next allocation. Storing the filler map without checking top is
1719 // always safe because the limit of the heap is always aligned.
1720 ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
1721 and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);
1722 Label aligned;
1723 b(eq, &aligned);
1724 mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map()));
1725 str(scratch2, MemOperand(result, kDoubleSize / 2, PostIndex));
1726 bind(&aligned);
1727 }
1728
1705 // Calculate new top and bail out if new space is exhausted. Use result 1729 // Calculate new top and bail out if new space is exhausted. Use result
1706 // to calculate the new top. Object size may be in words so a shift is 1730 // to calculate the new top. Object size may be in words so a shift is
1707 // required to get the number of bytes. 1731 // required to get the number of bytes.
1708 if ((flags & SIZE_IN_WORDS) != 0) { 1732 if ((flags & SIZE_IN_WORDS) != 0) {
1709 add(scratch2, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC); 1733 add(scratch2, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC);
1710 } else { 1734 } else {
1711 add(scratch2, result, Operand(object_size), SetCC); 1735 add(scratch2, result, Operand(object_size), SetCC);
1712 } 1736 }
1713 b(cs, gc_required); 1737 b(cs, gc_required);
1714 cmp(scratch2, Operand(ip)); 1738 cmp(scratch2, Operand(ip));
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3916 void CodePatcher::EmitCondition(Condition cond) { 3940 void CodePatcher::EmitCondition(Condition cond) {
3917 Instr instr = Assembler::instr_at(masm_.pc_); 3941 Instr instr = Assembler::instr_at(masm_.pc_);
3918 instr = (instr & ~kCondMask) | cond; 3942 instr = (instr & ~kCondMask) | cond;
3919 masm_.emit(instr); 3943 masm_.emit(instr);
3920 } 3944 }
3921 3945
3922 3946
3923 } } // namespace v8::internal 3947 } } // namespace v8::internal
3924 3948
3925 #endif // V8_TARGET_ARCH_ARM 3949 #endif // V8_TARGET_ARCH_ARM
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